diff --git a/test/test-pdbg-dts.cpp b/test/test-pdbg-dts.cpp
index 9853a07..83d3f89 100644
--- a/test/test-pdbg-dts.cpp
+++ b/test/test-pdbg-dts.cpp
@@ -246,4 +246,42 @@
 
     trace::inf("chips size: %u", chips.size());
     EXPECT_EQ(2, chips.size());
+
+    /* TODO: There is an issue with the getActiveChips() function that only
+     *       seems to exist in simulation. For some reason, the OCMBs do not
+     *       show up as PDBG_TARGET_ENABLED. If we remove that check, this test
+     *       case works as expected. However, we don't want to do that in
+     *       production code.  Instead, we'll need to determine why the OCMBs
+     *       are not enabled in CI test and then reenable this test case.
+    auto proc0 = getTrgt("/proc0");
+    auto proc1 = getTrgt("/proc1");
+
+    sim::ScomAccess& scom = sim::ScomAccess::getSingleton();
+    scom.flush();
+
+    // Mask off proc0 mcc0 channel 1. The connected OCMB should be removed from
+    // the list.
+    scom.add(proc0, 0x0C010D03, 0x0f00000000000000);
+
+    // Mask off one or two attentions, but not all, on proc0 mcc2. None of the
+    // connected OCMBs should be removed from the list.
+    scom.add(proc0, 0x0D010D03, 0xA500000000000000);
+
+    // Mask off proc1 mcc7 channel 0. The connected OCMB should be removed from
+    // the list.
+    scom.add(proc1, 0x0F010D43, 0xf000000000000000);
+
+    // Mask off proc1 mcc5 channels 0 and 1. Both the connected OCMBs should be
+    // removed from the list.
+    scom.add(proc1, 0x0E010D43, 0xff00000000000000);
+
+    std::vector<libhei::Chip> chips;
+    getActiveChips(chips);
+
+    // In total there should be 14 chips with 2 processors, 7 OCMBs on proc0,
+    // and 5 OCMBs on proc1.
+
+    trace::inf("chips size: %u", chips.size());
+    EXPECT_EQ(14, chips.size());
+    */
 }