commit 2d4981aaf6b410bdb5128390a195c22eecb7505b
author Zane Shelley <zshelle@us.ibm.com> Thu Jun 04 14:32:45 2020 -0500
committer Zane Shelley <zshelle@us.ibm.com> Thu Jun 04 14:32:45 2020 -0500
tree af8e13a373932587aa54cec26990b5ec18f912ea
parent 55afd63e8e3410d73bec0c01499f0c2b381fc070

Simplified registerRead and registerWrite interfaces

Uses an unsigned integer instead of arbitrary buffer. This avoids
the potential of the user application writing past the buffer size and
creating a buffer overrun.

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: If8f6144a88cc63d0bbdd3d63ee69135018377066

src/register/hei_hardware_register.cpp

diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index 2d2167e..d24d251 100644
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -52,33 +52,23 @@
 {
     bool accessFailure = false;
 
+    // This register must be readable.
+    HEI_ASSERT(queryAttrFlag(REG_ATTR_ACCESS_READ));
+
     // Read from hardware only if the read is forced or the entry for this
     // instance does not exist in the cache.
     if (i_force || !queryCache(i_chip))
     {
-        // This register must be readable.
-        HEI_ASSERT(queryAttrFlag(REG_ATTR_ACCESS_READ));
-
-        // Get the buffer from the register cache.
-        BitString& bs = accessCache(i_chip);
-
-        // Get the byte size of the buffer.
-        size_t sz_buffer = BitString::getMinBytes(bs.getBitLen());
-
         // Read this register from hardware.
-        accessFailure = registerRead(i_chip, bs.getBufAddr(), sz_buffer,
-                                     getType(), getAddress());
-        if (accessFailure)
+        uint64_t val  = 0;
+        accessFailure = registerRead(i_chip, getType(), getAddress(), val);
+        if (!accessFailure)
         {
-            // The read failed and we can't trust what was put in the register
-            // cache. So remove this instance's entry from the cache.
-            flush(i_chip);
-        }
-        else
-        {
-            // Sanity check. The returned size of the data written to the buffer
-            // should match the register size.
-            HEI_ASSERT(getSize() == sz_buffer);
+            // Get the buffer from the register cache.
+            BitString& bs = accessCache(i_chip);
+
+            // Set this value in the bit string buffer.
+            bs.setFieldRight(0, bs.getBitLen(), val);
         }
     }
 
@@ -91,8 +81,6 @@
 
 bool HardwareRegister::write(const Chip& i_chip) const
 {
-    bool accessFailure = false;
-
     // This register must be writable.
     HEI_ASSERT(queryAttrFlag(REG_ATTR_ACCESS_WRITE));
 
@@ -102,21 +90,11 @@
     // Get the buffer from the register cache.
     BitString& bs = accessCache(i_chip);
 
-    // Get the byte size of the buffer.
-    size_t sz_buffer = BitString::getMinBytes(bs.getBitLen());
+    // Set this value from the bit string buffer.
+    uint64_t val = bs.getFieldRight(0, bs.getBitLen());
 
     // Write to this register to hardware.
-    accessFailure = registerWrite(i_chip, bs.getBufAddr(), sz_buffer, getType(),
-                                  getAddress());
-
-    if (accessFailure)
-    {
-        // Sanity check. The returned size of the data written to the buffer
-        // should match the register size.
-        HEI_ASSERT(getSize() == sz_buffer);
-    }
-
-    return accessFailure;
+    return registerWrite(i_chip, getType(), getAddress(), val);
 }
 
 #endif // __HEI_ENABLE_HW_WRITE