clang-format: copy latest and re-format
clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.
Change-Id: Icd194181395c93ad4486785aec752f2096a00ea7
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
diff --git a/.clang-format b/.clang-format
index 1313ec8..d92a3f1 100644
--- a/.clang-format
+++ b/.clang-format
@@ -3,13 +3,15 @@
# BasedOnStyle: LLVM
AccessModifierOffset: -2
AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: true
+AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
AlignEscapedNewlines: Right
-AlignOperands: true
-AlignTrailingComments: true
+AlignOperands: Align
+AlignTrailingComments:
+ Kind: Always
+ OverEmptyLines: 1
AllowAllParametersOfDeclarationOnNextLine: true
-AllowShortBlocksOnASingleLine: false
+AllowShortBlocksOnASingleLine: Empty
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: Empty
AllowShortIfStatementsOnASingleLine: false
@@ -36,12 +38,13 @@
SplitEmptyFunction: false
SplitEmptyRecord: false
SplitEmptyNamespace: false
+BreakAfterAttributes: Never
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
BreakBeforeTernaryOperators: true
BreakConstructorInitializers: AfterColon
BreakInheritanceList: AfterColon
-BreakStringLiterals: true
+BreakStringLiterals: false
ColumnLimit: 80
CommentPragmas: '^ IWYU pragma:'
CompactNamespaces: false
@@ -75,9 +78,13 @@
- Regex: '.*'
Priority: 6
IndentCaseLabels: true
+IndentRequiresClause: true
IndentWidth: 4
IndentWrappedFunctionNames: true
+InsertNewlineAtEOF: true
KeepEmptyLinesAtTheStartOfBlocks: false
+LambdaBodyIndentation: OuterScope
+LineEnding: LF
MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 1
@@ -85,13 +92,19 @@
ObjCBlockIndentWidth: 2
ObjCSpaceAfterProperty: false
ObjCSpaceBeforeProtocolList: true
+PenaltyBreakAssignment: 25
PenaltyBreakBeforeFirstCallParameter: 19
PenaltyBreakComment: 300
PenaltyBreakFirstLessLess: 120
PenaltyBreakString: 1000
PenaltyExcessCharacter: 1000000
PenaltyReturnTypeOnItsOwnLine: 60
+PenaltyIndentedWhitespace: 0
+QualifierAlignment: Left
+ReferenceAlignment: Left
ReflowComments: true
+RequiresClausePosition: OwnLine
+RequiresExpressionIndentation: Keyword
SortIncludes: true
SortUsingDeclarations: true
SpaceAfterCStyleCast: false
@@ -111,7 +124,6 @@
SpacesInSquareBrackets: false
Standard: Latest
TabWidth: 4
-UseCRLF: false
UseTab: Never
...
diff --git a/src/chip_data/hei_chip_data.cpp b/src/chip_data/hei_chip_data.cpp
index 847c0a5..c5506aa 100644
--- a/src/chip_data/hei_chip_data.cpp
+++ b/src/chip_data/hei_chip_data.cpp
@@ -47,7 +47,7 @@
// Get this register from the flyweight factory.
auto& factory = Flyweight<const ScomRegister>::getSingleton();
- auto hwReg = factory.get(id, inst, attr, addr);
+ auto hwReg = factory.get(id, inst, attr, addr);
// Add this register to the isolation chip.
io_isoChip->addHardwareRegister(hwReg);
@@ -59,7 +59,7 @@
// Get this register from the flyweight factory.
auto& factory = Flyweight<const IdScomRegister>::getSingleton();
- auto hwReg = factory.get(id, inst, attr, addr);
+ auto hwReg = factory.get(id, inst, attr, addr);
// Add this register to the isolation chip.
io_isoChip->addHardwareRegister(hwReg);
@@ -239,8 +239,8 @@
//------------------------------------------------------------------------------
using TmpChildNodeMap = std::map<BitPosition_t, IsolationNode::Key>;
-using TmpNodeData = std::pair<IsolationNode::Ptr, TmpChildNodeMap>;
-using TmpNodeMap = std::map<IsolationNode::Key, TmpNodeData>;
+using TmpNodeData = std::pair<IsolationNode::Ptr, TmpChildNodeMap>;
+using TmpNodeMap = std::map<IsolationNode::Key, TmpNodeData>;
void __readNode(ChipDataStream& io_stream, const IsolationChip::Ptr& i_isoChip,
TmpNodeMap& io_tmpNodeMap, Version_t i_version)
@@ -264,8 +264,8 @@
HEI_ASSERT(0 != numIsoRules || 0 == numChildNodes);
// Allocate memory for this isolation node.
- auto isoNode =
- std::make_shared<IsolationNode>(nodeId, nodeInst, regType);
+ auto isoNode = std::make_shared<IsolationNode>(nodeId, nodeInst,
+ regType);
// Add capture registers.
for (unsigned int j = 0; j < numCapRegs; j++)
@@ -320,8 +320,8 @@
Instance_t childInst;
io_stream >> bit >> childId >> childInst;
- auto ret =
- cMap.emplace(bit, IsolationNode::Key{childId, childInst});
+ auto ret = cMap.emplace(bit,
+ IsolationNode::Key{childId, childInst});
HEI_ASSERT(ret.second); // Should not have duplicate entries
}
@@ -340,13 +340,13 @@
{
for (const auto& n : i_tmpNodeMap)
{
- const IsolationNode::Ptr& node = n.second.first;
+ const IsolationNode::Ptr& node = n.second.first;
const TmpChildNodeMap& childMap = n.second.second;
// Link the child nodes, if they exist.
for (const auto& c : childMap)
{
- const BitPosition_t& bit = c.first;
+ const BitPosition_t& bit = c.first;
const IsolationNode::Key& childKey = c.second;
// Find the child node in the temporary map.
diff --git a/src/hei_signature.hpp b/src/hei_signature.hpp
index 0cb0444..2e8ca41 100644
--- a/src/hei_signature.hpp
+++ b/src/hei_signature.hpp
@@ -51,9 +51,9 @@
private:
Chip iv_chip; ///< Chip containing this register.
- NodeId_t iv_id = 0; ///< Node ID.
+ NodeId_t iv_id = 0; ///< Node ID.
Instance_t iv_instance = 0; ///< Instance of this register.
- BitPosition_t iv_bit = 0; ///< Target bit within this register.
+ BitPosition_t iv_bit = 0; ///< Target bit within this register.
/** Attention type reported by this bit. */
AttentionType_t iv_attnType = ATTN_TYPE_CHIP_CS;
diff --git a/src/hei_types.hpp b/src/hei_types.hpp
index bdbbffb..80f5ef8 100644
--- a/src/hei_types.hpp
+++ b/src/hei_types.hpp
@@ -63,7 +63,7 @@
*/
enum RegisterType_t : uint8_t
{
- REG_TYPE_SCOM = 0x01, ///< Power Systems SCOM register.
+ REG_TYPE_SCOM = 0x01, ///< Power Systems SCOM register.
REG_TYPE_ID_SCOM = 0x02, ///< Power Systems Indirect SCOM register.
};
@@ -145,9 +145,9 @@
*/
enum RegisterAttributeFlags_t : uint8_t
{
- REG_ATTR_ACCESS_READ = 0x80, ///< Register read access access
+ REG_ATTR_ACCESS_READ = 0x80, ///< Register read access access
REG_ATTR_ACCESS_WRITE = 0x40, ///< Register write access access
- REG_ATTR_RESERVED = 0x3f, ///< Reserved/unused bits
+ REG_ATTR_RESERVED = 0x3f, ///< Reserved/unused bits
};
/**
diff --git a/src/isolator/hei_isolation_chip.hpp b/src/isolator/hei_isolation_chip.hpp
index 7ba7346..7f13b47 100644
--- a/src/isolator/hei_isolation_chip.hpp
+++ b/src/isolator/hei_isolation_chip.hpp
@@ -31,7 +31,7 @@
class IsolationChip
{
public: // Aliases
- using Ptr = std::shared_ptr<IsolationChip>;
+ using Ptr = std::shared_ptr<IsolationChip>;
using ConstPtr = std::shared_ptr<const IsolationChip>;
using Map = std::map<ChipType_t, const ConstPtr>;
diff --git a/src/isolator/hei_isolation_node.cpp b/src/isolator/hei_isolation_node.cpp
index 119c5ae..78c5b65 100644
--- a/src/isolator/hei_isolation_node.cpp
+++ b/src/isolator/hei_isolation_node.cpp
@@ -51,8 +51,8 @@
{
// This bit was driven from an attention from another register.
// Continue down the isolation tree to look for more attentions.
- bool attnFound =
- child_itr->second->analyze(i_chip, i_attnType, io_isoData);
+ bool attnFound = child_itr->second->analyze(i_chip, i_attnType,
+ io_isoData);
if (!attnFound)
{
// It is possible the child node is only intended for FFDC.
@@ -152,8 +152,8 @@
void IsolationNode::pushIsolationStack() const
{
// Ensure this node does not already exist in cv_isolationStack.
- auto itr =
- std::find(cv_isolationStack.begin(), cv_isolationStack.end(), this);
+ auto itr = std::find(cv_isolationStack.begin(), cv_isolationStack.end(),
+ this);
HEI_ASSERT(cv_isolationStack.end() == itr);
// Push to node to the stack.
diff --git a/src/isolator/hei_isolation_node.hpp b/src/isolator/hei_isolation_node.hpp
index 858a8c1..d88ad02 100644
--- a/src/isolator/hei_isolation_node.hpp
+++ b/src/isolator/hei_isolation_node.hpp
@@ -40,7 +40,7 @@
class IsolationNode
{
public: // Aliases
- using Ptr = std::shared_ptr<IsolationNode>;
+ using Ptr = std::shared_ptr<IsolationNode>;
using ConstPtr = std::shared_ptr<const IsolationNode>;
using Key = std::pair<NodeId_t, Instance_t>;
diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index b6a2d12..0aa2342 100644
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -60,7 +60,7 @@
if (i_force || !queryCache(i_chip))
{
// Read this register from hardware.
- uint64_t val = 0;
+ uint64_t val = 0;
accessFailure = registerRead(i_chip, getType(), getAddress(), val);
if (!accessFailure)
{
diff --git a/src/register/hei_hardware_register.hpp b/src/register/hei_hardware_register.hpp
index be9fdc1..85d87ff 100644
--- a/src/register/hei_hardware_register.hpp
+++ b/src/register/hei_hardware_register.hpp
@@ -37,7 +37,7 @@
class HardwareRegister : public Register
{
public: // Aliases
- using Ptr = std::shared_ptr<HardwareRegister>;
+ using Ptr = std::shared_ptr<HardwareRegister>;
using ConstPtr = std::shared_ptr<const HardwareRegister>;
using Key = std::pair<RegisterId_t, Instance_t>;
diff --git a/src/register/hei_register.hpp b/src/register/hei_register.hpp
index 1f69cb2..6c1f1a9 100644
--- a/src/register/hei_register.hpp
+++ b/src/register/hei_register.hpp
@@ -27,7 +27,7 @@
class Register
{
public: // Aliases
- using Ptr = std::shared_ptr<Register>;
+ using Ptr = std::shared_ptr<Register>;
using ConstPtr = std::shared_ptr<const Register>;
public:
diff --git a/src/util/hei_bit_string.cpp b/src/util/hei_bit_string.cpp
index 5313d7a..d5c9b83 100644
--- a/src/util/hei_bit_string.cpp
+++ b/src/util/hei_bit_string.cpp
@@ -30,18 +30,18 @@
// Get the relative address of this byte and the relative starting position
// within the byte.
- uint64_t relPos = 0;
+ uint64_t relPos = 0;
uint8_t* relAddr = getRelativePosition(relPos, i_pos);
// Get the length of the target bit field within this byte and the length of
// the bit field for any remaining bits.
- uint64_t bf_len = i_len;
+ uint64_t bf_len = i_len;
uint64_t remain_len = 0;
if (UINT8_BIT_LEN < relPos + i_len)
{
// The target bit field crosses a byte boundary. So truncate the bit
// length for this byte and update the remaining length.
- bf_len = UINT8_BIT_LEN - relPos;
+ bf_len = UINT8_BIT_LEN - relPos;
remain_len = i_len - bf_len;
}
@@ -74,18 +74,18 @@
// Get the relative address of this byte and the relative starting position
// within the byte.
- uint64_t relPos = 0;
+ uint64_t relPos = 0;
uint8_t* relAddr = getRelativePosition(relPos, i_pos);
// Get the length of the target bit field within this byte and the length of
// the bit field for any remaining bits.
- uint64_t bf_len = i_len;
+ uint64_t bf_len = i_len;
uint64_t remain_len = 0;
if (UINT8_BIT_LEN < relPos + i_len)
{
// The target bit field crosses a byte boundary. So truncate the bit
// length for this byte and update the remaining length.
- bf_len = UINT8_BIT_LEN - relPos;
+ bf_len = UINT8_BIT_LEN - relPos;
remain_len = i_len - bf_len;
}
@@ -204,7 +204,7 @@
// Start with the last chunk and work backwards.
for (int32_t pos = lastPos; 0 <= pos; pos -= UINT64_BIT_LEN)
{
- uint64_t len = std::min(actLen - pos, UINT64_BIT_LEN);
+ uint64_t len = std::min(actLen - pos, UINT64_BIT_LEN);
uint64_t value = i_sStr.getFieldRight(i_sPos + pos, len);
setFieldRight(i_dPos + pos, len, value);
}
diff --git a/src/util/hei_flyweight.hpp b/src/util/hei_flyweight.hpp
index a81fe30..a4c063d 100644
--- a/src/util/hei_flyweight.hpp
+++ b/src/util/hei_flyweight.hpp
@@ -56,7 +56,7 @@
auto itr = std::lower_bound(
iv_index.begin(), iv_index.end(), newEntry,
[](const std::shared_ptr<T> a, const std::shared_ptr<T> b) {
- return *a < *b;
+ return *a < *b;
});
// std::lower_bound() will return the first element that does not
diff --git a/test/bit_string_test.cpp b/test/bit_string_test.cpp
index 1c7290c..98bab7d 100644
--- a/test/bit_string_test.cpp
+++ b/test/bit_string_test.cpp
@@ -4,7 +4,7 @@
using namespace libhei;
-static constexpr uint32_t UINT8_BIT_LEN = (sizeof(uint8_t) * 8);
+static constexpr uint32_t UINT8_BIT_LEN = (sizeof(uint8_t) * 8);
static constexpr uint32_t UINT64_BIT_LEN = (sizeof(uint64_t) * 8);
// setBit()
diff --git a/test/flyweight_test.cpp b/test/flyweight_test.cpp
index 9ed9eb6..0b629a9 100644
--- a/test/flyweight_test.cpp
+++ b/test/flyweight_test.cpp
@@ -31,8 +31,8 @@
auto f2 = foo_factory.get(2);
auto f3 = foo_factory.get(1); // same as f1
- ASSERT_NE(f1, f2); // Pointing to different objects
- ASSERT_EQ(f1, f3); // Pointing to the same object
+ ASSERT_NE(f1, f2); // Pointing to different objects
+ ASSERT_EQ(f1, f3); // Pointing to the same object
ASSERT_EQ(size_t(2),
foo_factory.size()); // Only two entries in the flyweight
diff --git a/test/operator_register_test.cpp b/test/operator_register_test.cpp
index 227a566..2f79ba7 100644
--- a/test/operator_register_test.cpp
+++ b/test/operator_register_test.cpp
@@ -48,9 +48,9 @@
TEST(OperatorRegisterTest, BasicOperationsWithFlyweights)
{
auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
- auto& and_factory = Flyweight<const AndRegister>::getSingleton();
- auto& or_factory = Flyweight<const OrRegister>::getSingleton();
- auto& not_factory = Flyweight<const NotRegister>::getSingleton();
+ auto& and_factory = Flyweight<const AndRegister>::getSingleton();
+ auto& or_factory = Flyweight<const OrRegister>::getSingleton();
+ auto& not_factory = Flyweight<const NotRegister>::getSingleton();
auto const1 = const_factory.get(CONST1);
auto const2 = const_factory.get(CONST2);
@@ -70,7 +70,7 @@
TEST(OperatorRegisterTest, ShiftOperations)
{
- auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
+ auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
auto& lshift_factory = Flyweight<const LeftShiftRegister>::getSingleton();
auto& rshift_factory = Flyweight<const RightShiftRegister>::getSingleton();
@@ -96,10 +96,10 @@
// Something seemingly complex:
// ~(((CONST1 & CONST2) << 12) | ((CONST1 | CONST2) >> 4)))
- auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
- auto& and_factory = Flyweight<const AndRegister>::getSingleton();
- auto& or_factory = Flyweight<const OrRegister>::getSingleton();
- auto& not_factory = Flyweight<const NotRegister>::getSingleton();
+ auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
+ auto& and_factory = Flyweight<const AndRegister>::getSingleton();
+ auto& or_factory = Flyweight<const OrRegister>::getSingleton();
+ auto& not_factory = Flyweight<const NotRegister>::getSingleton();
auto& lshift_factory = Flyweight<const LeftShiftRegister>::getSingleton();
auto& rshift_factory = Flyweight<const RightShiftRegister>::getSingleton();
@@ -125,7 +125,7 @@
TEST(OperatorRegisterTest, ConstRegConstructor)
{
auto& const_factory = Flyweight<const ConstantRegister>::getSingleton();
- auto& and_factory = Flyweight<const AndRegister>::getSingleton();
+ auto& and_factory = Flyweight<const AndRegister>::getSingleton();
// The ConstRegister constructor is a template that requires some integer
// type.
diff --git a/test/simulator/simulator.hpp b/test/simulator/simulator.hpp
index 085c5ff..4f81508 100644
--- a/test/simulator/simulator.hpp
+++ b/test/simulator/simulator.hpp
@@ -43,11 +43,11 @@
/** The list of supported chip types for the simulator. */
enum SimChipType
{
- SAMPLE = 0xdeadbeef,
+ SAMPLE = 0xdeadbeef,
EXPLORER_11 = 0x60d20011,
EXPLORER_20 = 0x60d20020,
- P10_10 = 0x20da0010,
- P10_20 = 0x20da0020,
+ P10_10 = 0x20da0010,
+ P10_20 = 0x20da0020,
};
private:
@@ -125,8 +125,8 @@
void addSignature(const Signature& i_signature)
{
// First check if this entry already exists.
- auto itr =
- std::find(iv_expSigList.begin(), iv_expSigList.end(), i_signature);
+ auto itr = std::find(iv_expSigList.begin(), iv_expSigList.end(),
+ i_signature);
ASSERT_EQ(iv_expSigList.end(), itr);
// Add the new entry.
diff --git a/test/test-util-hash.cpp b/test/test-util-hash.cpp
index ba35625..bec7505 100644
--- a/test/test-util-hash.cpp
+++ b/test/test-util-hash.cpp
@@ -8,11 +8,11 @@
{
std::string s{"SOME_RANDOM_STRING"};
- uint8_t h1 = 0xBE;
- uint16_t h2 = 0xF2DD;
- uint32_t h3 = 0xDFB31440;
- uint64_t h4 = 0xD0D3828Ec49F687C;
- NodeId_t h5 = 0xF2DD; // 2-byte field
+ uint8_t h1 = 0xBE;
+ uint16_t h2 = 0xF2DD;
+ uint32_t h3 = 0xDFB31440;
+ uint64_t h4 = 0xD0D3828Ec49F687C;
+ NodeId_t h5 = 0xF2DD; // 2-byte field
RegisterId_t h6 = static_cast<RegisterId_t>(0x31D080); // 3-byte field
EXPECT_EQ(h1, hash<uint8_t>(s));