Markdown and minor updates for new chip data write op support

Signed-off-by: Caleb Palmer <cnpalmer@us.ibm.com>
Change-Id: Ibe913800fc62cab2c801db0a5e4d38b97553fe62
diff --git a/chip_data/chip-data-json.md b/chip_data/chip-data-json.md
index 5918689..8f12fad 100644
--- a/chip_data/chip-data-json.md
+++ b/chip_data/chip-data-json.md
@@ -449,13 +449,15 @@
 **Important:** If a group instance is not defined in this map, the register
 simply will not be captured.
 
+---
+
 ## 10) Operation Rule JSON Object
 
 The object describes the operation and register required to perform some write
 operation to a FIR. The operation to be performed is specified by the key value
 of the `op_rules` property of a Isolation Node JSON object.
 
-### 11.1) Property: `op_rule` (required, string)
+### 10.1) Property: `op_rule` (required, string)
 
 A string used to describe what action will need to be taken to write the
 indicated register.
@@ -467,7 +469,7 @@
 | `read_set_write`   | Read, modify, write indicated reg to set a bit          |
 | `read_clear_write` | Read, modify, write indicated reg to clear a bit        |
 
-### 11.2) Property: `reg_name` (required, string)
+### 10.2) Property: `reg_name` (required, string)
 
 A string used to indicate the register to be written to perform the desired
 write operation to the FIR or it's mask. The name of the register should match a
@@ -475,9 +477,9 @@
 
 ---
 
-## 10) Appendix
+## 11) Appendix
 
-### 10.1) Number Formats
+### 11.1) Number Formats
 
 All numbers in the Chip Data files are unsigned integers. When possible, the
 JSON integer data type should be used for performance and file size.
@@ -486,19 +488,19 @@
 specifically for numbers that are better served to be in the hexadecimal format.
 In which case, the string value must start with '0x'.
 
-### 10.2) Number Ranges
+### 11.2) Number Ranges
 
 A number range represents consecutive ascending or descending numbers (including
 both endpoints) and are expressed using a colon (e.g. "8:15" or "15:8").
 
-### 10.3) Instance Maps
+### 11.3) Instance Maps
 
 Instance Maps are a simple JSON object mapping one type of instance to another.
 Say for example you are targeting a specific capture group instance and you want
 to capture all of the associated registers for FFDC. The Capture Register JSON
 object instance maps define how group instances map to register instances.
 
-### 10.4) Supported Chip Models and EC Levels
+### 11.4) Supported Chip Models and EC Levels
 
 | Value         | Description          |
 | ------------- | -------------------- |
@@ -508,7 +510,7 @@
 | `P10_10`      | P10 EC 1.0           |
 | `P10_20`      | P10 EC 2.0           |
 
-### 10.5) Supported Attention Types
+### 11.5) Supported Attention Types
 
 **Important:** A chip checkstop is often associated with a system checkstop,
 which is certainly true for processor chips. However, systems may, but not
@@ -523,7 +525,7 @@
 | `SP_ATTN`   | SW or HW event requiring action by the SP firmware.    |
 | `HOST_ATTN` | SW or HW event requiring action by the host firmware.  |
 
-### 10.6) Supported Register Types
+### 11.6) Supported Register Types
 
 - POWER Systems SCOM register (default)
 
@@ -538,7 +540,7 @@
   - Register length: 8 bytes
   - Bit order: ascending (0-63, left to right)
 
-### 10.7) Supported Register Access Types
+### 11.7) Supported Register Access Types
 
 | Value | Description                     |
 | ----- | ------------------------------- |
diff --git a/chip_data/pyprd/chip_data/binary.py b/chip_data/pyprd/chip_data/binary.py
index cbd281d..ce0307d 100644
--- a/chip_data/pyprd/chip_data/binary.py
+++ b/chip_data/pyprd/chip_data/binary.py
@@ -91,7 +91,18 @@
 
 
 def _op_name(name: str) -> bytes:
-    return _hash(1, name)
+    m = {"FIR_SET": 1, "FIR_CLEAR": 2, "MASK_SET": 3, "MASK_CLEAR": 4}
+    return _bin(1, m[name])
+
+
+def _op_rule(rule: str) -> bytes:
+    m = {
+        "atomic_or": 1,
+        "atomic_and": 2,
+        "read_set_write": 3,
+        "read_clear_write": 4,
+    }
+    return _bin(1, m[rule])
 
 
 def _num_op_rules(iterable: iter) -> bytes:
@@ -279,7 +290,7 @@
         data += _num_op_rules(iso_node.op_rules)
         for op_name, op_rule in sorted(iso_node.op_rules.items()):
             data += _op_name(op_name)
-            data += _op_name(op_rule.op_rule)
+            data += _op_rule(op_rule.op_rule)
             data += _reg_name(op_rule.reg_name)
 
         for node_inst in sorted(iso_node.instances):
diff --git a/src/chip_data/chip_data_binary.md b/src/chip_data/chip_data_binary.md
index 54f21bc..f26cd39 100644
--- a/src/chip_data/chip_data_binary.md
+++ b/src/chip_data/chip_data_binary.md
@@ -101,6 +101,24 @@
 the same register type expressed in this field. This will ensure there is no
 ambiguity when resolving the bitwise expressions in the isolation rules.
 
+**Version 3 and newer:**
+
+Beginning with **version 3** the chip data binary will support defining write
+operations for FIR bits. The following will be appended to the Isolation Node
+data after the number of node instances:
+
+| Bytes | Desc                  | Value/Example               |
+| :---: | :-------------------- | :-------------------------- |
+|   1   | # of write operations | Number of write ops defined |
+
+Then, each write operation will have the following data:
+
+| Bytes | Desc              | Value/Example                    |
+| :---: | :---------------- | :------------------------------- |
+|   1   | operation name ID | See appendix for supported names |
+|   1   | operation rule ID | See appendix for supported rules |
+|   3   | register ID       | See section 2 for details        |
+
 #### 3.1) Isolation Node Instances
 
 Much like a register, a node can have multiple instances. Each instance will
@@ -344,3 +362,21 @@
 |   1   | expression type = 0x14 |
 |   1   | shift value            |
 |  \*   | sub-expression         |
+
+### 4) Supported Write Operation Names
+
+| Value | Description                                |
+| :---: | :----------------------------------------- |
+|   1   | Operation to set a bit in the FIR          |
+|   2   | Operation to clear a bit in the FIR        |
+|   3   | Operation to set a bit in the FIR's mask   |
+|   4   | Operation to clear a bit in the FIR's mask |
+
+### 5) Supported Write Operation Rules
+
+| Value | Description                                          |
+| :---: | :--------------------------------------------------- |
+|   1   | Indicated reg ID is an atomic OR reg to set a bit    |
+|   2   | Indicated reg ID is an atomic AND reg to clear a bit |
+|   3   | Read, modify, write indicated reg ID to set a bit    |
+|   4   | Read, modify, write indicated reg ID to clear a bit  |
diff --git a/src/hei_types.hpp b/src/hei_types.hpp
index dc88351..665a41d 100644
--- a/src/hei_types.hpp
+++ b/src/hei_types.hpp
@@ -138,26 +138,36 @@
  * defined in the Chip Data Files.
  *
  * Values:
- *   This is a hashed value of one of the following string names:
- *   "FIR_SET", "FIR_CLEAR", "MASK_SET", "MASK_CLEAR".
+ *   The supported write operation values are listed in the enum.
  *
  * Range:
  *   This is defined as a 1-byte field in the Chip Data Files.
  */
-using OpRuleName_t = uint8_t;
+enum OpRuleName_t : uint8_t
+{
+    FIR_SET = 1,    ///< Operation to set a FIR bit
+    FIR_CLEAR = 2,  ///< Operation to clear a FIR bit
+    MASK_SET = 3,   ///< Operation to set a FIR mask bit
+    MASK_CLEAR = 4, ///< Operation to set a FIR mask bit
+};
 
 /**
  * This is used to define the type of a write operation rule for a FIR,
  * defined in the Chip Data Files.
  *
  * Values:
- *   This is a hashed value of one of the following string names:
- *   "atomic_or", "atomic_and", "read_set_write", "read_clear_write".
+ *   The supported write operation types are listed in the enum.
  *
  * Range:
  *   This is defined as a 1-byte field in the Chip Data Files.
  */
-using OpRuleType_t = uint8_t;
+enum OpRuleType_t : uint8_t
+{
+    ATOMIC_OR = 1,        ///< Indicated reg ID is an atomic OR used to write
+    ATOMIC_AND = 2,       ///< Indicated reg ID is an atomic AND used to clear
+    READ_SET_WRITE = 3,   ///< Read, set, write indicated reg ID
+    READ_CLEAR_WRITE = 4, ///< Read, clear, write indicated reg ID
+};
 
 /**
  * The hardware register attribute flags.