Removed HardwareRegister::Accessor class

Opted for a simpler interface that passes the accessor chip into the
public functions.

Change-Id: Iddbe171a59455d80cfe045004cb1662e894374f7
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index a1de684..d3c5dd0 100755
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -22,72 +22,81 @@
 
 //------------------------------------------------------------------------------
 
-const BitString * HardwareRegister::getBitString() const
+const BitString * HardwareRegister::getBitString( const Chip & i_chip ) const
 {
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
     // cannot read hardware for write-only registers. In this case, an entry
     // will be created in the cache, if it does not exist, when the cache is
-    // read below.
+    // accessed below.
 
     if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
          ( REG_ACCESS_WO   != getAccessLevel() ) )
     {
-        read();
+        read( i_chip );
     }
 
-    return &( accessCache() );
+    return &( accessCache(i_chip) );
 }
 
 //------------------------------------------------------------------------------
 
 #if 0
-BitString & HardwareRegister::accessBitString()
+BitString & HardwareRegister::accessBitString( const Chip & i_chip )
 {
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
     // cannot read hardware for write-only registers. In this case, an entry
     // will be created in the cache, if it does not exist, when the cache is
-    // read below.
+    // accessed below.
 
     if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
          ( REG_ACCESS_WO   != getAccessLevel() ) )
     {
-        read();
+        read( i_chip );
     }
 
-    return accessCache();
+    return accessCache( i_chip );
 }
 #endif
 
 //------------------------------------------------------------------------------
 
-ReturnCode HardwareRegister::read( bool i_force ) const
+ReturnCode HardwareRegister::read( const Chip & i_chip, bool i_force ) const
 {
     ReturnCode rc;
 
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Read from hardware only if the read is forced or the entry for this
     // instance does not exist in the cache.
-    if ( i_force || !queryCache() )
+    if ( i_force || !queryCache(i_chip) )
     {
         // This register must be readable.
         HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
                     ( REG_ACCESS_WO   != getAccessLevel() ) );
 
         // Get the buffer from the register cache.
-        BitString & bs = accessCache();
+        BitString & bs = accessCache( i_chip );
 
         // Get the byte size of the buffer.
         size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
 
         // Read this register from hardware.
-        rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(),
+        rc = registerRead( i_chip.getChip(), bs.getBufAddr(),
                            sz_buffer, getRegisterType(), getAddress() );
         if ( RC_SUCCESS != rc )
         {
             // The read failed and we can't trust what was put in the register
             // cache. So remove this instance's entry from the cache.
-            cv_cache.flush( getAccessorChip(), this );
+            flush( i_chip );
         }
         else
         {
@@ -104,25 +113,28 @@
 
 #ifndef __HEI_READ_ONLY
 
-ReturnCode HardwareRegister::write() const
+ReturnCode HardwareRegister::write( const Chip & i_chip ) const
 {
     ReturnCode rc;
 
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // This register must be writable.
     HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
                 ( REG_ACCESS_RO   != getAccessLevel() ) );
 
     // An entry for this register must exist in the cache.
-    HEI_ASSERT( queryCache() );
+    HEI_ASSERT( queryCache(i_chip) );
 
     // Get the buffer from the register cache.
-    BitString & bs = accessCache();
+    BitString & bs = accessCache( i_chip );
 
     // Get the byte size of the buffer.
     size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
 
     // Write to this register to hardware.
-    rc = registerWrite( getAccessorChip().getChip(), bs.getBufAddr(),
+    rc = registerWrite( i_chip.getChip(), bs.getBufAddr(),
                         sz_buffer, getRegisterType(), getAddress() );
 
     if ( RC_SUCCESS == rc )
@@ -139,10 +151,6 @@
 
 //------------------------------------------------------------------------------
 
-HardwareRegister::Accessor * HardwareRegister::cv_accessor = nullptr;
-
-//------------------------------------------------------------------------------
-
 HardwareRegister::Cache HardwareRegister::cv_cache {};
 
 //------------------------------------------------------------------------------