diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index a1de684..d3c5dd0 100755
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -22,72 +22,81 @@
 
 //------------------------------------------------------------------------------
 
-const BitString * HardwareRegister::getBitString() const
+const BitString * HardwareRegister::getBitString( const Chip & i_chip ) const
 {
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
     // cannot read hardware for write-only registers. In this case, an entry
     // will be created in the cache, if it does not exist, when the cache is
-    // read below.
+    // accessed below.
 
     if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
          ( REG_ACCESS_WO   != getAccessLevel() ) )
     {
-        read();
+        read( i_chip );
     }
 
-    return &( accessCache() );
+    return &( accessCache(i_chip) );
 }
 
 //------------------------------------------------------------------------------
 
 #if 0
-BitString & HardwareRegister::accessBitString()
+BitString & HardwareRegister::accessBitString( const Chip & i_chip )
 {
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
     // cannot read hardware for write-only registers. In this case, an entry
     // will be created in the cache, if it does not exist, when the cache is
-    // read below.
+    // accessed below.
 
     if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
          ( REG_ACCESS_WO   != getAccessLevel() ) )
     {
-        read();
+        read( i_chip );
     }
 
-    return accessCache();
+    return accessCache( i_chip );
 }
 #endif
 
 //------------------------------------------------------------------------------
 
-ReturnCode HardwareRegister::read( bool i_force ) const
+ReturnCode HardwareRegister::read( const Chip & i_chip, bool i_force ) const
 {
     ReturnCode rc;
 
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // Read from hardware only if the read is forced or the entry for this
     // instance does not exist in the cache.
-    if ( i_force || !queryCache() )
+    if ( i_force || !queryCache(i_chip) )
     {
         // This register must be readable.
         HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
                     ( REG_ACCESS_WO   != getAccessLevel() ) );
 
         // Get the buffer from the register cache.
-        BitString & bs = accessCache();
+        BitString & bs = accessCache( i_chip );
 
         // Get the byte size of the buffer.
         size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
 
         // Read this register from hardware.
-        rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(),
+        rc = registerRead( i_chip.getChip(), bs.getBufAddr(),
                            sz_buffer, getRegisterType(), getAddress() );
         if ( RC_SUCCESS != rc )
         {
             // The read failed and we can't trust what was put in the register
             // cache. So remove this instance's entry from the cache.
-            cv_cache.flush( getAccessorChip(), this );
+            flush( i_chip );
         }
         else
         {
@@ -104,25 +113,28 @@
 
 #ifndef __HEI_READ_ONLY
 
-ReturnCode HardwareRegister::write() const
+ReturnCode HardwareRegister::write( const Chip & i_chip ) const
 {
     ReturnCode rc;
 
+    // Verify this register belongs on i_chip.
+    verifyAccessorChip( i_chip );
+
     // This register must be writable.
     HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
                 ( REG_ACCESS_RO   != getAccessLevel() ) );
 
     // An entry for this register must exist in the cache.
-    HEI_ASSERT( queryCache() );
+    HEI_ASSERT( queryCache(i_chip) );
 
     // Get the buffer from the register cache.
-    BitString & bs = accessCache();
+    BitString & bs = accessCache( i_chip );
 
     // Get the byte size of the buffer.
     size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
 
     // Write to this register to hardware.
-    rc = registerWrite( getAccessorChip().getChip(), bs.getBufAddr(),
+    rc = registerWrite( i_chip.getChip(), bs.getBufAddr(),
                         sz_buffer, getRegisterType(), getAddress() );
 
     if ( RC_SUCCESS == rc )
@@ -139,10 +151,6 @@
 
 //------------------------------------------------------------------------------
 
-HardwareRegister::Accessor * HardwareRegister::cv_accessor = nullptr;
-
-//------------------------------------------------------------------------------
-
 HardwareRegister::Cache HardwareRegister::cv_cache {};
 
 //------------------------------------------------------------------------------
diff --git a/src/register/hei_hardware_register.hpp b/src/register/hei_hardware_register.hpp
index dfe6c60..ce7c6a9 100755
--- a/src/register/hei_hardware_register.hpp
+++ b/src/register/hei_hardware_register.hpp
@@ -15,14 +15,10 @@
  *
  *  Actual hardware access is defined by the user application via the user
  *  interface APIs. In order to tell the user application which chip to target,
- *  the user application gives the isolator pointers to its chip objects. As
- *  each chip needs to be accessed, the isolator must store the chip in a
- *  static variable defined in this class. The intended use is:
- *
- *   - Call HardwareRegister::setAccessor() with the target chip.
- *   - Perform all necessary hardware accesses to that chip.
- *   - Call HardwareRegister::clearAccessor() to remove the chip access. This
- *     helps ensure we don't try to access the wrong chip.
+ *  the user application will give the isolator a list of pointers to its
+ *  objects. They will then be passed into the public functions of this class
+ *  and eventually given back to the user application when hardware access is
+ *  needed.
  *
  * Register cache:
  *
@@ -106,7 +102,7 @@
   public:
 
     /** Function overloaded from parent Register class. */
-    virtual const BitString * getBitString() const;
+    virtual const BitString * getBitString( const Chip & i_chip ) const;
 
 #if 0
     /**
@@ -119,6 +115,7 @@
 
     /**
      * @brief  Reads a register from hardware via the user interface APIs.
+     * @param  i_chip  The target chip in which this register belongs.
      * @param  i_force When false, this function will only read from hardware if
      *                 an entry for this instance does not already exist in the
      *                 register cache. When true, the entry in the register
@@ -126,16 +123,17 @@
      *                 read from hardware and update the cache.
      * @return See the return code from the registerRead() user interface API.
      */
-    ReturnCode read( bool i_force = false ) const;
+    ReturnCode read( const Chip & i_chip, bool i_force = false ) const;
 
     #ifndef __HEI_READ_ONLY
 
     /**
      * @brief  Writes the value stored in the register cache to hardware via the
      *         user interface APIs.
+     * @param  i_chip  The target chip in which this register belongs.
      * @return See the return code from the registerWrite() user interface API.
      */
-    ReturnCode write() const;
+    ReturnCode write( const Chip & i_chip ) const;
 
     #endif // __HEI_READ_ONLY
 
@@ -143,92 +141,19 @@
   protected: // Functions
 
     /**
+     * @param  i_chip  The target chip in which this register belongs.
      * @return If iv_operationType indicates a register read is possible
      *         (ACCESS_RO or ACCESS_RW), returns a reference to bit string.
      */
-    virtual BitString & accessBitString();
+    virtual BitString & accessBitString( const Chip & i_chip );
 #endif
 
-  private: // Hardware accessor class variable
-
-    /** @brief A simple class that stores the chip used to access hardware. */
-    class Accessor
-    {
-      public:
-
-        /**
-         * @brief Constructor.
-         * @param i_chip The chip used to access hardware.
-         */
-        explicit Accessor( const Chip & i_chip ) :
-            iv_chip( i_chip )
-        {}
-
-        /** @brief Destructor. */
-        ~Accessor() = default;
-
-        /** @brief Copy constructor. */
-        Accessor( const Accessor & ) = delete;
-
-        /** @brief Assignment operator. */
-        Accessor & operator=( const Accessor & ) = delete;
-
-        /** @return The chip used to access hardware. */
-        const Chip & getChip() const { return iv_chip; }
-
-      private:
-
-        /**
-         * A Chip object provided by the user application. The isolator does not
-         * know anything about this object nor how to use it. Its only purpose
-         * is to get passed back to the user application for hardware access
-         * operations.
-         */
-        const Chip iv_chip;
-
-    }; // end class Accessor
-
-    /**
-     * This allows all HardwareRegister objects access to a chip via the user
-     * interface APIs. It is intentially defined as a pointer. It can be set to
-     * nullptr to signify that access is restricted at this time. This is useful
-     * to prevent users from accidentally accessing registers on the wrong chip.
-     * It is recommended to use setAccessor() and clearAccessor() to manage this
-     * variable.
-     */
-    static Accessor * cv_accessor;
-
-  public: // Hardware accessor management functions.
-
-    /**
-     * @brief Initializes a new hardware accessor.
-     * @param i_chip The chip used to access hardware.
-     */
-    static void setAccessor( const Chip & i_chip )
-    {
-        clearAccessor();
-        cv_accessor = new Accessor( i_chip );
-    }
-
-    /** @brief Deletes the current hardware accessor. */
-    static void clearAccessor()
-    {
-        delete cv_accessor;
-        cv_accessor = nullptr;
-    }
-
   private: // Hardware accessor management functions.
 
-    /** @return The chip stored in cv_accessor. */
-    const Chip & getAccessorChip() const
+    /** @brief Asserts this register belongs on the target accessor chip. */
+    void verifyAccessorChip( const Chip & i_chip ) const
     {
-        HEI_ASSERT( nullptr != cv_accessor );
-
-        // Extra sanity check to verify this register belongs on the target
-        // accessor chip.
-        HEI_ASSERT( getChipType() != cv_accessor->getChip().getType() );
-
-        return cv_accessor->getChip();
+        HEI_ASSERT( getChipType() == i_chip.getType() );
     }
 
   private: // Register cache class variable
@@ -314,18 +239,33 @@
     /** @brief Flushes the entire register cache. */
     static void flushAll() { cv_cache.flush(); }
 
-  private: // Register cache management functions.
-
-    /** @return True if an entry for this register exist in this cache. */
-    bool queryCache() const
+    /**
+     * @brief Flushes this register from the cache.
+     * @param  i_chip  The target chip in which this register belongs.
+     */
+    void flush( const Chip & i_chip ) const
     {
-        return cv_cache.query( getAccessorChip(), this );
+        cv_cache.flush( i_chip, this );
     }
 
-    /** @return A reference to this register's BitString in cache. */
-    BitString & accessCache() const
+  private: // Register cache management functions.
+
+    /**
+     * @param  i_chip  The target chip in which this register belongs.
+     * @return True if an entry for this register exist in this cache.
+     */
+    bool queryCache( const Chip & i_chip ) const
     {
-        return cv_cache.access( getAccessorChip(), this );
+        return cv_cache.query( i_chip, this );
+    }
+
+    /**
+     * @param  i_chip  The target chip in which this register belongs.
+     * @return A reference to this register's BitString in cache.
+     */
+    BitString & accessCache( const Chip & i_chip ) const
+    {
+        return cv_cache.access( i_chip, this );
     }
 };
 
diff --git a/src/register/hei_operator_register.hpp b/src/register/hei_operator_register.hpp
index 260f931..ee2519c 100755
--- a/src/register/hei_operator_register.hpp
+++ b/src/register/hei_operator_register.hpp
@@ -36,10 +36,9 @@
     virtual uint32_t Read() const { return iv_child->Read();  }
     virtual uint32_t Write()      { return iv_child->Write(); }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
-        (*iv_bs) = ~(*iv_child->GetBitString(i_type));
+        (*iv_bs) = ~(*iv_child->getBitString(i_chip));
         return iv_bs;
     }
 
@@ -66,99 +65,6 @@
     BitStringBuffer iv_iBS;
 };
 
-class SummaryRegister : public Register
-{
-  public:
-    SummaryRegister() :
-        Register( ), iv_child(nullptr), iv_amount(0), iv_iBS(0)
-    {
-        iv_bs = &iv_iBS;
-    }
-
-    SummaryRegister(Register & i_arg, uint16_t i_amount) :
-        Register( ), iv_child(&i_arg), iv_amount(i_amount),
-        iv_iBS(i_arg.GetBitLength())
-    {
-        iv_bs = &iv_iBS;
-    }
-
-    SummaryRegister & operator=(const SummaryRegister & r)
-    {
-        iv_child = r.iv_child;
-        iv_amount = r.iv_amount;
-        iv_iBS = r.iv_iBS;
-        //iv_bs = r.iv_bs; <-- don't do this!
-        return *this;
-    }
-
-    virtual uint32_t Read() const
-    {
-        uint32_t rc = iv_child->Read();
-        if ( PRD_SCANCOM_FAILURE == rc )
-        {
-            // This is a bit unusual, but we are going to ignore SCOM failures.
-            // This takes care of a corner case where one of the summary
-            // registers in the list returns an error, but there is another
-            // summary register with an active attention, which would be ignored
-            // if we return a bad rc.
-            HEI_INF( "[SummaryRegister::read] SCOM failure on register ID "
-                      "0x%04x, ignoring error", iv_child->GetId() );
-            rc = SUCCESS;
-            iv_child->clearAllBits(); // just in case
-        }
-        return rc;
-    }
-
-    virtual uint32_t Write()      { return iv_child->Write(); }
-
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
-    {
-        iv_bs->clearAll();
-
-        PRDF::BitString tmp = *iv_child->GetBitString(i_type);
-
-        //if any bits are set in iv_child, then set the iv_amount bit
-        if (0 != tmp.getSetCount())
-        {
-            iv_bs->setBit(0);
-            *iv_bs = *iv_bs >> iv_amount;
-        }
-        return iv_bs;
-    }
-
-    virtual uint16_t GetId() const { return iv_child->GetId(); }
-    virtual void SetId(uint16_t i_id) {}
-
-    bool operator==(const SummaryRegister & r) const
-    { return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); }
-
-    bool operator<(const SummaryRegister & r) const
-    {
-        if (iv_child == r.iv_child)
-            return iv_amount < r.iv_amount;
-        return iv_child < r.iv_child;
-    }
-
-    bool operator>=(const SummaryRegister & r) const
-    {
-        if (iv_child == r.iv_child)
-            return iv_amount >= r.iv_amount;
-        return iv_child >= r.iv_child;
-    }
-
-  protected:
-    BitString & AccessBitString(void) { return iv_iBS; }
-    void SetBitString(const BitString *) {}
-
-  private:
-    Register * iv_child;
-    uint16_t iv_amount;
-
-    BitStringBuffer * iv_bs;
-    BitStringBuffer iv_iBS;
-};
-
 class LeftShiftRegister : public Register
 {
   public:
@@ -187,10 +93,9 @@
     virtual uint32_t Read() const { return iv_child->Read();  }
     virtual uint32_t Write()      { return iv_child->Write(); }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
-        (*iv_bs) = (*iv_child->GetBitString(i_type)) << iv_amount;
+        (*iv_bs) = (*iv_child->getBitString(i_chip)) << iv_amount;
         return iv_bs;
     }
 
@@ -254,10 +159,9 @@
     virtual uint32_t Read() const { return iv_child->Read();  }
     virtual uint32_t Write()      { return iv_child->Write(); }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
-        (*iv_bs) = (*iv_child->GetBitString(i_type)) >> iv_amount;
+        (*iv_bs) = (*iv_child->getBitString(i_chip)) >> iv_amount;
         return iv_bs;
     }
 
@@ -330,11 +234,10 @@
         return iv_left->Write() | iv_right->Write();
     }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
-        (*iv_bs) = *iv_left->GetBitString(i_type);
-        (*iv_bs) = (*iv_bs) & (*iv_right->GetBitString(i_type));
+        (*iv_bs) = *iv_left->getBitString(i_chip);
+        (*iv_bs) = (*iv_bs) & (*iv_right->getBitString(i_chip));
         return iv_bs;
     }
 
@@ -413,11 +316,10 @@
         return iv_left->Write() | iv_right->Write();
     }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE ) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
-        (*iv_bs) = *iv_left->GetBitString(i_type);
-        (*iv_bs) = (*iv_bs) | (*iv_right->GetBitString(i_type));
+        (*iv_bs) = *iv_left->getBitString(i_chip);
+        (*iv_bs) = (*iv_bs) | (*iv_right->getBitString(i_chip));
         return iv_bs;
     }
 
@@ -474,8 +376,7 @@
     virtual uint32_t Read() const { return 0; }
     virtual uint32_t Write()      { return 0; }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
         return &iv_iBS;
     }
@@ -494,138 +395,6 @@
 
 };
 
-class AttnTypeRegister : public Register
-{
-  public:
-    AttnTypeRegister() :
-        Register( ), iv_check(&cv_null), iv_recov(&cv_null),
-        iv_special(&cv_null), iv_proccs(&cv_null), iv_hostattn(&cv_null),
-        iv_iBS(0)
-    {
-        iv_bs = &iv_iBS;
-    }
-
-    AttnTypeRegister( Register *i_check,
-                      Register *i_recov,
-                      Register *i_special,
-                      Register *i_proccs,
-                      Register *i_hostattn ) :
-        Register( ),
-        iv_check(    nullptr == i_check    ? &cv_null : i_check),
-        iv_recov(    nullptr == i_recov    ? &cv_null : i_recov),
-        iv_special(  nullptr == i_special  ? &cv_null : i_special),
-        iv_proccs(   nullptr == i_proccs   ? &cv_null : i_proccs),
-        iv_hostattn( nullptr == i_hostattn ? &cv_null : i_hostattn),
-        iv_iBS(0)         // will fully initialize this inside ctor.
-    {
-        uint32_t l_length = 1024;
-        l_length = std::min(l_length, iv_check->GetBitLength());
-        l_length = std::min(l_length, iv_recov->GetBitLength());
-        l_length = std::min(l_length, iv_special->GetBitLength());
-        l_length = std::min(l_length, iv_proccs->GetBitLength());
-        l_length = std::min(l_length, iv_hostattn->GetBitLength());
-        iv_iBS = BitStringBuffer(l_length);
-        iv_bs = &iv_iBS;
-    }
-
-    AttnTypeRegister & operator=(const AttnTypeRegister & r)
-    {
-        //iv_null = r.iv_null; <-- don't do this!
-        iv_check    = (r.iv_check    == &r.cv_null ? &cv_null : r.iv_check);
-        iv_recov    = (r.iv_recov    == &r.cv_null ? &cv_null : r.iv_recov);
-        iv_special  = (r.iv_special  == &r.cv_null ? &cv_null : r.iv_special);
-        iv_proccs   = (r.iv_proccs   == &r.cv_null ? &cv_null : r.iv_proccs);
-        iv_hostattn = (r.iv_hostattn == &r.cv_null ? &cv_null : r.iv_hostattn);
-        iv_iBS = r.iv_iBS;
-        //iv_bs = r.iv_bs; <-- don't do this!
-        return *this;
-    }
-
-    virtual uint32_t Read() const
-    {
-        return iv_check->Read()   | iv_recov->Read() |
-               iv_special->Read() | iv_proccs->Read() |
-               iv_hostattn->Read();
-    }
-
-    virtual uint32_t Write()
-    {
-        return iv_check->Write()   | iv_recov->Write() |
-               iv_special->Write() | iv_proccs->Write() |
-               iv_hostattn->Write();
-    }
-
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
-    {
-        switch (i_type)
-        {
-            case CHECK_STOP:
-                (*iv_bs) = BitStringBuffer(
-                                            *iv_check->GetBitString(i_type));
-                break;
-
-            case RECOVERABLE:
-                (*iv_bs) = BitStringBuffer(
-                                            *iv_recov->GetBitString(i_type));
-                break;
-
-            case SPECIAL:
-                (*iv_bs) = BitStringBuffer(
-                                            *iv_special->GetBitString(i_type));
-                break;
-
-            case PROC_CS:
-                (*iv_bs) = BitStringBuffer(
-                                            *iv_proccs->GetBitString(i_type));
-                break;
-
-            case HOST_ATTN:
-                (*iv_bs) = BitStringBuffer(
-                                            *iv_hostattn->GetBitString(i_type));
-                break;
-        }
-
-        return iv_bs;
-    }
-
-    virtual uint16_t GetId() const
-    {
-        uint16_t l_rc = Prdr::SignatureOp::DEFAULT_SIGNATURE;
-        l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_check->GetId());
-        l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_recov->GetId());
-        l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_special->GetId());
-        l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_proccs->GetId());
-        l_rc = Prdr::SignatureOp::combineSig(l_rc, iv_hostattn->GetId());
-        return l_rc;
-    }
-
-    virtual void SetId(uint16_t i_id) {}
-
-    bool operator==(const AttnTypeRegister & r) const
-    {
-        return (r.iv_check   == iv_check)   && (r.iv_recov  == iv_recov) &&
-               (r.iv_special == iv_special) && (r.iv_proccs == iv_proccs) &&
-               (r.iv_special == iv_hostattn);
-    }
-
-  protected:
-    BitString & AccessBitString(void) { return iv_iBS; }
-    void SetBitString(const BitString *) {}
-
-  private:
-    static NullRegister cv_null;
-
-    Register * iv_check;
-    Register * iv_recov;
-    Register * iv_special;
-    Register * iv_proccs;
-    Register * iv_hostattn;
-
-    BitStringBuffer * iv_bs;
-    BitStringBuffer iv_iBS;
-};
-
 class ConstantRegister : public Register
 {
   public:
@@ -646,8 +415,7 @@
     virtual uint32_t Read() const { return SUCCESS; }
     virtual uint32_t Write()      { return SUCCESS; }
 
-    const BitString * GetBitString(
-                    ATTENTION_TYPE i_type = INVALID_ATTENTION_TYPE) const
+    const BitString * getBitString( const Chip & i_chip ) const
     {
         return &iv_iBS;
     }
diff --git a/src/register/hei_register.hpp b/src/register/hei_register.hpp
index 3e2fb8d..2a5c6ef 100755
--- a/src/register/hei_register.hpp
+++ b/src/register/hei_register.hpp
@@ -19,7 +19,7 @@
                                       CHIP_TYPE, ACCESS_RO);
 Register * mask = new ConstantRegister( 0xffffffff00000000 );
 Register * fir_mask = new AndRegister(fir, mask);
-const BitString * bs = fir_mask->getBitString();
+const BitString * bs = fir_mask->getBitString(chip);
 
 The getBitString function (defined by each register) provides access to
 the BitString that manages each register's data.  In this example bs will
@@ -33,12 +33,11 @@
     virtual ~Register() = 0;
 
     /**
-    @brief      Provides access to the BitString that manages
-                this register's data.
-    @return     A pointer to a BitString.
-    */
-    virtual const BitString * getBitString() const = 0;
-
+     * @brief  Provides access to the value of this register.
+     * @param  i_chip Indicates which chip to access for this register.
+     * @return A BitString containing the value of this register.
+     */
+    virtual const BitString * getBitString( const Chip & i_chip ) const = 0;
 };
 
 // Pure virtual destructor must be defined.