Chip data file updates for MCC chiplet

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I24b66e385c8a6c413eca1fec12cf797f1ae5e529
diff --git a/xml/p10/node_mc_dstl_fir.xml b/xml/p10/node_mc_dstl_fir.xml
index 15251de..2b04af8 100644
--- a/xml/p10/node_mc_dstl_fir.xml
+++ b/xml/p10/node_mc_dstl_fir.xml
@@ -15,45 +15,69 @@
         <action attn_type="UCS" config="110"/>
         <action attn_type="HA" config="001"/>
     </local_fir>
-    <bit pos="0">AFU initiated Checkstop on Subchannel A</bit>
-    <bit pos="1">AFU initiated Recoverable Attention on Subchannel A</bit>
-    <bit pos="2">AFU initiated Special Attention on Subchannel A</bit>
-    <bit pos="3">AFU initiated Application Interrupt Attention on Subchannel A</bit>
-    <bit pos="4">AFU initiated Checkstop on Subchannel B</bit>
-    <bit pos="5">AFU initiated Recoverable Attention on Subchannel B</bit>
-    <bit pos="6">AFU initiated Special Attention on Subchannel B</bit>
-    <bit pos="7">AFU initiated Application Interrupt Attention on Subchannel B</bit>
-    <bit pos="8">Error on parity bits protecting incoming command from MCS to DSTL.</bit>
-    <bit pos="9">A credit reset was attempted while rd and wdf buffers in use.</bit>
-    <bit pos="10">DSTL Configuration Register has taken a recoverable parity error.</bit>
-    <bit pos="11">DSTL Configuration Register has taken a fatal parity error.</bit>
-    <bit pos="12">DSTL Subchannel A, a counter took an underflow or overflow error.</bit>
-    <bit pos="13">DSTL Subchannel B, a counter took an underflow or overflow error.</bit>
-    <bit pos="14">DSTL Subchannel A timed out having valid commands and not sending any flits.</bit>
-    <bit pos="15">DSTL Subchannel B timed out having valid commands and not sending any flits.</bit>
-    <bit pos="16">DSTL has detected that attached buffer on subchannel A has used more tlxvc0 or tlxvc3 credits than it has been given.</bit>
-    <bit pos="17">DSTL has detected that attached buffer on subchannel B has used more tlxvc0 or tlxvc3 credits than it has been given.</bit>
-    <bit pos="18">DSTL Subchannel A observed link going down.</bit>
-    <bit pos="19">DSTL Subchannel B observed link going down.</bit>
-    <bit pos="20">DSTL Subchannel A has entered the fail state.</bit>
-    <bit pos="21">DSTL Subchannel B has entered the fail state.</bit>
-    <bit pos="22">Channel timeout has occured on Subchannel A index.</bit>
-    <bit pos="23">Channel timeout has occured on Subchannel B index.</bit>
-    <bit pos="24">Error info from decrypt</bit>
-    <bit pos="25">Error info from decrypt</bit>
-    <bit pos="26">Error info from decrypt</bit>
-    <bit pos="27">Error info from decrypt</bit>
-    <bit pos="28">Error info from decrypt</bit>
-    <bit pos="29">Error info from encrypt</bit>
-    <bit pos="30">Error info from encrypt</bit>
-    <bit pos="31">Error info from encrypt</bit>
-    <bit pos="32">Error info from encrypt</bit>
-    <bit pos="33">On Subchhanel A, received an AFU initiated Application Interrupt Attention when one was already being processed and issued a retry.</bit>
-    <bit pos="34">On Subchhanel B, received an AFU initiated Application Interrupt Attention when one was already being processed and issued a retry.</bit>
-    <bit pos="35">A parity error local to Subchhanel A occurred.</bit>
-    <bit pos="36">A parity error local to Subchhanel B occurred.</bit>
-    <bit pos="37">Spare FIR bit 37.</bit>
-    <bit pos="38">Spare FIR bit 38.</bit>
-    <bit pos="39">Indicates that this subchannel has significant traffic flow.</bit>
-    <bit pos="40">Indicates that this subchannel has significant traffic flow.</bit>
+    <register name="MC_DSTL_ERR_RPT">
+        <instance addr="0x0C010D0C" reg_inst="0"/>
+        <instance addr="0x0C010D4C" reg_inst="1"/>
+        <instance addr="0x0D010D0C" reg_inst="2"/>
+        <instance addr="0x0D010D4C" reg_inst="3"/>
+        <instance addr="0x0E010D0C" reg_inst="4"/>
+        <instance addr="0x0E010D4C" reg_inst="5"/>
+        <instance addr="0x0F010D0C" reg_inst="6"/>
+        <instance addr="0x0F010D4C" reg_inst="7"/>
+    </register>
+    <register name="MC_DSTL_CFG2">
+        <instance addr="0x0C010D0E" reg_inst="0"/>
+        <instance addr="0x0C010D4E" reg_inst="1"/>
+        <instance addr="0x0D010D0E" reg_inst="2"/>
+        <instance addr="0x0D010D4E" reg_inst="3"/>
+        <instance addr="0x0E010D0E" reg_inst="4"/>
+        <instance addr="0x0E010D4E" reg_inst="5"/>
+        <instance addr="0x0F010D0E" reg_inst="6"/>
+        <instance addr="0x0F010D4E" reg_inst="7"/>
+    </register>
+    <capture_group node_inst="0:7">
+        <capture_register reg_inst="0:7" reg_name="MC_DSTL_ERR_RPT" />
+        <capture_register reg_inst="0:7" reg_name="MC_DSTL_CFG2" />
+    </capture_group>
+    <bit pos="0">Subchannel A AFU initiated Checkstop</bit>
+    <bit pos="1">Subchannel A AFU initiated Recoverable Attention</bit>
+    <bit pos="2">Subchannel A AFU initiated Special Attention</bit>
+    <bit pos="3">Subchannel A AFU initiated Application Interrupt Attention</bit>
+    <bit pos="4">Subchannel B AFU initiated Checkstop</bit>
+    <bit pos="5">Subchannel B AFU initiated Recoverable Attention</bit>
+    <bit pos="6">Subchannel B AFU initiated Special Attention</bit>
+    <bit pos="7">Subchannel B AFU initiated Application Interrupt Attention</bit>
+    <bit pos="8">Error on parity bits protecting incoming command from MCS to DSTL</bit>
+    <bit pos="9">A credit reset was attempted while rd and wdf buffers in use</bit>
+    <bit pos="10">Config reg recoverable parity error</bit>
+    <bit pos="11">Config reg fatal parity error</bit>
+    <bit pos="12">Subchannel A counter error</bit>
+    <bit pos="13">Subchannel B counter error</bit>
+    <bit pos="14">Subchannel A valid cmd timeout error</bit>
+    <bit pos="15">Subchannel B valid cmd timeout error</bit>
+    <bit pos="16">Subchannel A buffer overuse error</bit>
+    <bit pos="17">Subchannel B buffer overuse error</bit>
+    <bit pos="18">Subchannel A DL link down</bit>
+    <bit pos="19">Subchannel B DL link down</bit>
+    <bit pos="20">Subchannel A has entered the fail state</bit>
+    <bit pos="21">Subchannel B has entered the fail state</bit>
+    <bit pos="22">Subchannel A Channel timeout</bit>
+    <bit pos="23">Subchannel B Channel timeout</bit>
+    <bit pos="24">decrypt err: scom reg has parity error</bit>
+    <bit pos="25">decrypt err: attempt to write or access key when locked</bit>
+    <bit pos="26">decrypt err: address pipe parity error</bit>
+    <bit pos="27">decrypt err: CL to decrypt parity error on valid tag</bit>
+    <bit pos="28">decrypt err: parity error on USTL decrypt DMX interface</bit>
+    <bit pos="29">encrypt err: scom reg has parity error</bit>
+    <bit pos="30">encrypt err: attempt to write or access key when locked</bit>
+    <bit pos="31">encrypt err: parity error on address encryption rounds</bit>
+    <bit pos="32">encrypt err: parity error on data encryption rounds</bit>
+    <bit pos="33">Subchannel A AFU Application Interrupt Attention while another in process</bit>
+    <bit pos="34">Subchannel B AFU Application Interrupt Attention while another in process</bit>
+    <bit pos="35">A parity error local to Subchhanel A occurred</bit>
+    <bit pos="36">A parity error local to Subchhanel B occurred</bit>
+    <bit pos="37">reserved</bit>
+    <bit pos="38">reserved</bit>
+    <bit pos="39">Subchannel A has significant traffic flow</bit>
+    <bit pos="40">Subchannel B has significant traffic flow</bit>
 </attn_node>