updates to HardwareRegister class
Removed, updated, and uncommented most of the code ported from the
Hostboot project.
Signed-off-by: Paul Greenwood <Paul.Greenwood@ibm.com>
Change-Id: Id554adada52598d6d71422fdeb8f6ae3e69af5f0
diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index 0c1e871..a1de684 100755
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -1,53 +1,8 @@
-// Module Description **************************************************
-//
-// Description: This module provides the implementation for the PRD Scan
-// Comm Register Chip class.
-//
-// End Module Description **********************************************
-
-//----------------------------------------------------------------------
-// Includes
-//----------------------------------------------------------------------
-
#include <hei_includes.hpp>
#include <hei_user_interface.hpp>
#include <register/hei_hardware_register.hpp>
#include <util/hei_bit_string.hpp>
-#if 0
-#include <iipchip.h>
-#include <prdfMain.H>
-#include <prdfRasServices.H>
-#include <prdfPlatServices.H>
-#include <prdfExtensibleChip.H>
-
-//----------------------------------------------------------------------
-// User Types
-//----------------------------------------------------------------------
-
-//----------------------------------------------------------------------
-// Constants
-//----------------------------------------------------------------------
-
-//----------------------------------------------------------------------
-// Macros
-//----------------------------------------------------------------------
-
-//----------------------------------------------------------------------
-// Internal Function Prototypes
-//----------------------------------------------------------------------
-
-//----------------------------------------------------------------------
-// Global Variables
-//----------------------------------------------------------------------
-
-//---------------------------------------------------------------------
-// Member Function Specifications
-//---------------------------------------------------------------------
-
-// --------------------------------------------------------------------
-#endif
-
namespace libhei
{
@@ -58,27 +13,27 @@
//------------------------------------------------------------------------------
#if 0
-void HardwareRegister::SetBitString( const BitString *bs )
+void HardwareRegister::setBitString( const BitString *bs )
{
- BitString & l_string = AccessBitString();
+ BitString & l_string = accessBitString();
l_string.setString(*bs);
}
-
+#endif
//------------------------------------------------------------------------------
-const BitString * HardwareRegister::GetBitString(ATTENTION_TYPE i_type) const
+const BitString * HardwareRegister::getBitString() const
{
- // Calling Read() will ensure that an entry exists in the cache and the
+ // Calling read() will ensure that an entry exists in the cache and the
// entry has at been synched with hardware at least once. Note that we
// cannot read hardware for write-only registers. In this case, an entry
// will be created in the cache, if it does not exist, when the cache is
// read below.
- if ( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_WO != iv_operationType ) )
+ if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
+ ( REG_ACCESS_WO != getAccessLevel() ) )
{
- Read();
+ read();
}
return &( accessCache() );
@@ -86,18 +41,19 @@
//------------------------------------------------------------------------------
-BitString & HardwareRegister::AccessBitString()
+#if 0
+BitString & HardwareRegister::accessBitString()
{
- // Calling Read() will ensure that an entry exists in the cache and the
+ // Calling read() will ensure that an entry exists in the cache and the
// entry has at been synched with hardware at least once. Note that we
// cannot read hardware for write-only registers. In this case, an entry
// will be created in the cache, if it does not exist, when the cache is
// read below.
- if ( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_WO != iv_operationType ) )
+ if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
+ ( REG_ACCESS_WO != getAccessLevel() ) )
{
- Read();
+ read();
}
return accessCache();
@@ -114,10 +70,9 @@
// instance does not exist in the cache.
if ( i_force || !queryCache() )
{
-#if 0
// This register must be readable.
- HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_WO != iv_operationType ) );
+ HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
+ ( REG_ACCESS_WO != getAccessLevel() ) );
// Get the buffer from the register cache.
BitString & bs = accessCache();
@@ -128,21 +83,18 @@
// Read this register from hardware.
rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(),
sz_buffer, getRegisterType(), getAddress() );
-#endif
if ( RC_SUCCESS != rc )
{
// The read failed and we can't trust what was put in the register
// cache. So remove this instance's entry from the cache.
cv_cache.flush( getAccessorChip(), this );
}
-#if 0
else
{
// Sanity check. The returned size of the data written to the buffer
// should match the register size.
HEI_ASSERT( getSize() == sz_buffer );
}
-#endif
}
return rc;
@@ -156,10 +108,9 @@
{
ReturnCode rc;
-#if 0
// This register must be writable.
- HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_RO != iv_operationType ) );
+ HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
+ ( REG_ACCESS_RO != getAccessLevel() ) );
// An entry for this register must exist in the cache.
HEI_ASSERT( queryCache() );
@@ -180,7 +131,6 @@
// should match the register size.
HEI_ASSERT( getSize() == sz_buffer );
}
-#endif
return rc;
}
@@ -189,46 +139,6 @@
//------------------------------------------------------------------------------
-bool HardwareRegister::operator == ( const HardwareRegister & i_rightRegister ) const
-{
-#if 0
- if( iv_scomAddress == i_rightRegister.GetAddress() )
- {
- return ( iv_chipType == i_rightRegister.getChipType() );
- }
- else
- {
- return false ;
- }
-#endif
- return false;
-}
-
-//-----------------------------------------------------------------------------
-bool HardwareRegister::operator < ( const HardwareRegister & i_rightRegister ) const
-{
-#if 0
- if( iv_scomAddress == i_rightRegister.GetAddress() )
- {
- return ( iv_chipType < i_rightRegister.getChipType() );
- }
- else
- {
- return( iv_scomAddress < i_rightRegister.GetAddress() );
- }
-#endif
- return false;
-}
-#if 0
-//-----------------------------------------------------------------------------
-bool HardwareRegister::operator >= ( const HardwareRegister & i_rightRegister ) const
-{
- return !( *this < i_rightRegister );
-}
-#endif
-
-//------------------------------------------------------------------------------
-
HardwareRegister::Accessor * HardwareRegister::cv_accessor = nullptr;
//------------------------------------------------------------------------------
@@ -265,7 +175,7 @@
// If the entry does not exist, create a new entry.
if ( !query(i_chip, i_hwReg) )
{
- BitString * bs = new BitStringBuffer { i_hwReg->getByteSize() * 8 };
+ BitString * bs = new BitStringBuffer { i_hwReg->getSize() * 8 };
iv_cache[i_chip][i_hwReg] = bs;
}
diff --git a/src/register/hei_hardware_register.hpp b/src/register/hei_hardware_register.hpp
index 3d2f974..dfe6c60 100755
--- a/src/register/hei_hardware_register.hpp
+++ b/src/register/hei_hardware_register.hpp
@@ -1,15 +1,5 @@
#pragma once
-/**
- * @brief Models register.It does not contain target.
- *
- * This class stores the hash id and bit length of scom registers It models
- * registers without maintaining target information. Instances of this class
- * are shared across rule chip objects of same type.Once prd object model is
- * built, instances of this register are saved in flyweight.These instances
- * persist as long as prd object model survives.
- */
-
#include <hei_includes.hpp>
#include <register/hei_register.hpp>
#include <util/hei_bit_string.hpp>
@@ -38,7 +28,7 @@
*
* In order to save memory space, each instance of this class does not store
* the contents of the target hardware register. Instead, that data is stored
- * in a register cache, which a static variable defined in this class. This
+ * in a register cache, which is a static variable defined in this class. This
* allows us to store only what we need. The cache can also be thought of as a
* snapshot of the registers at the time of isolation, which can be useful if
* the hardware is still running and register values could change.
@@ -115,37 +105,8 @@
public:
-#if 0
- /**
- * @brief constructor
- * @param i_address address of the register
- * @param i_bitLength bit length of register
- * @param i_targetType target type associated with register
- */
- HardwareRegister( uint64_t i_address, uint32_t i_bitLength,
- TARGETING::TYPE i_targetType, AccessLevel i_access ) :
- Register(),
- iv_bitLength( i_bitLength ),
- iv_chipType( i_targetType ),
- iv_scomAddress( i_address ),
- iv_operationType( i_access )
- {}
-
- /**
- * @brief constructor .Added this because we save object of this type in
- * @ FlyweightS
- */
- HardwareRegister():
- Register(),
- iv_bitLength( 0 ),
- iv_chipType( TARGETING::TYPE_NA ),
- iv_scomAddress( 0 ),
- iv_operationType( ACCESS_NONE )
- {}
-#endif
-
/** Function overloaded from parent Register class. */
- virtual const BitString * getBitString() const { return nullptr; }
+ virtual const BitString * getBitString() const;
#if 0
/**
@@ -153,16 +114,8 @@
* @param i_bs poiner to bit string
* @return Nil
*/
-
- virtual void SetBitString(const BitString * i_bs) ;
-
- /**
- * @brief Returns length of the bits string associated with register
- * @return length of bit string
- */
- uint32_t GetBitLength(void) const { return iv_bitLength ;}
+ virtual void setBitString(const BitString * i_bs) ;
#endif
- size_t getByteSize() const { return 8; } // TODO
/**
* @brief Reads a register from hardware via the user interface APIs.
@@ -187,93 +140,13 @@
#endif // __HEI_READ_ONLY
#if 0
- /**
- * @brief Returns the hash id of register
- * @return returns hash id of register
- * @pre None
- * @post None
- * @note
- */
- virtual uint16_t GetId(void) const { return iv_shortId; };
-
- /**
- * @brief Sets the hash id of register
- * @param i_id hash id of register
- * @return Nil
- */
- virtual void SetId(uint16_t i_id) { iv_shortId = i_id; };
-
- /**
- * @brief Returns type of Target associated with register.
- * @return Refer to function description
- */
- TARGETING::TYPE getChipType()const{ return iv_chipType ;} ;
- /**
- * @brief Returns scom address of register
- * @return Refer to function description
- */
- uint64_t GetAddress( ) const {return iv_scomAddress ;};
-#endif
- /**
- * @brief compares two ScomRegisterAccess register for equality
- * @param i_rightRegister register to be compared against
- * @return Returns true if registers are equal false otherwise
- */
- bool operator == ( const HardwareRegister & i_rightRegister ) const ;
- /**
- * @brief defines < operation for ScomRegisterAccess
- * @param i_rightRegister register to be compared against
- * @return Returns false if i_rightRegisters is less and true otherwise
- */
- bool operator < ( const HardwareRegister & i_rightRegister ) const ;
-#if 0
- /**
- * @brief defines >= operation for ScomRegisterAccess
- * @param i_rightRegister register to be compared against
- * @return Returns true if registers is >= i_rightRegister false
- * otherwise
- */
- bool operator >= ( const HardwareRegister & i_rightRegister ) const;
-
- /** @return The register access level (see enum AccessLevel). */
- virtual AccessLevel getAccessLevel() const { return iv_operationType; }
-
- /** @brief Sets the register access level (see enum AccessLevel). */
- virtual void setAccessLevel( AccessLevel i_op ) { iv_operationType = i_op; }
-
protected: // Functions
/**
- * @brief copy constructor
- * @param i_scomRegister scomRegister instance to be copied
+ * @return If iv_operationType indicates a register read is possible
+ * (ACCESS_RO or ACCESS_RW), returns a reference to bit string.
*/
- HardwareRegister( const Register & i_scomRegister ):
- Register(),
- iv_bitLength( i_scomRegister.GetBitLength() ),
- iv_shortId( i_scomRegister.GetId() ),
- iv_chipType( i_scomRegister.getChipType() ),
- iv_scomAddress( i_scomRegister.GetAddress() ),
- iv_operationType( i_scomRegister.getAccessLevel() )
- {}
-
- /**
- * @brief Returns reference to bit string associated with register
- * @return Refer to function description
- */
- virtual BitString & AccessBitString( );
-
-private: // functions
-
- friend class CaptureData;
-
- private: // Data
-
- uint32_t iv_bitLength; // bit length of scom
- uint16_t iv_shortId; // unique hash id of register
- TARGETING::TYPE iv_chipType; // type of target associated with register
- uint64_t iv_scomAddress; // scom address associated with regiser
- AccessLevel iv_operationType; // Operation supported (RO, WO, or RW)
-
+ virtual BitString & accessBitString();
#endif
private: // Hardware accessor class variable
@@ -351,11 +224,9 @@
{
HEI_ASSERT( nullptr != cv_accessor );
-#if 0
// Extra sanity check to verify this register belongs on the target
// accessor chip.
- HEI_ASSERT( getChipType() != cv_accessor->getChip().getChipType() );
-#endif
+ HEI_ASSERT( getChipType() != cv_accessor->getChip().getType() );
return cv_accessor->getChip();
}