Split remaining chiplet XML files by attn type

This really isn't necessary, but since most of the other chiplet files
are split, this change is only to maintain consistency.

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ieb4b5eea582e0c3dbc010cdb2c0bac1dc89386fe
diff --git a/xml/p10/node_cfir_mc_ucs.xml b/xml/p10/node_cfir_mc_ucs.xml
new file mode 100644
index 0000000..fa50cae
--- /dev/null
+++ b/xml/p10/node_cfir_mc_ucs.xml
@@ -0,0 +1,31 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10,P10_20" name="CFIR_MC_UCS" reg_type="SCOM">
+    <register name="CFIR_MC_UCS">
+        <instance addr="0x0C040003" reg_inst="0"/>
+        <instance addr="0x0D040003" reg_inst="1"/>
+        <instance addr="0x0E040003" reg_inst="2"/>
+        <instance addr="0x0F040003" reg_inst="3"/>
+    </register>
+    <register name="CFIR_MC_UCS_MASK">
+        <instance addr="0x0C040043" reg_inst="0"/>
+        <instance addr="0x0D040043" reg_inst="1"/>
+        <instance addr="0x0E040043" reg_inst="2"/>
+        <instance addr="0x0F040043" reg_inst="3"/>
+    </register>
+    <rule attn_type="UCS" node_inst="0:3">
+        <expr type="and">
+            <expr type="reg" value1="CFIR_MC_UCS"/>
+            <expr type="not">
+                <expr type="reg" value1="CFIR_MC_UCS_MASK"/>
+            </expr>
+            <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+        </expr>
+    </rule>
+    <bit child_node="MC_LOCAL_FIR" node_inst="0,1,2,3" pos="4">Attention from MC_LOCAL_FIR</bit>
+    <bit child_node="MC_DSTL_FIR" node_inst="0,2,4,6" pos="5">Attention from MC_DSTL_FIR 0</bit>
+    <bit child_node="MC_USTL_FIR" node_inst="0,2,4,6" pos="6">Attention from MC_USTL_FIR 0</bit>
+    <bit child_node="MC_DSTL_FIR" node_inst="1,3,5,7" pos="7">Attention from MC_DSTL_FIR 1</bit>
+    <bit child_node="MC_USTL_FIR" node_inst="1,3,5,7" pos="8">Attention from MC_USTL_FIR 1</bit>
+    <bit child_node="MC_FIR" node_inst="0,1,2,3" pos="9">Attention from MC_FIR</bit>
+    <bit child_node="MC_MISC_FIR" node_inst="0,1,2,3" pos="10">Attention from MC_MISC_FIR</bit>
+</attn_node>