diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index 3334662..52dc28c 100755
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -13,7 +13,7 @@
 //------------------------------------------------------------------------------
 
 #if 0
-void HardwareRegister::setBitString( const BitString *bs )
+void HardwareRegister::setBitString(const BitString *bs)
 {
     BitString & l_string  = accessBitString();
     l_string.setString(*bs);
@@ -22,10 +22,10 @@
 
 //------------------------------------------------------------------------------
 
-const BitString * HardwareRegister::getBitString( const Chip & i_chip ) const
+const BitString * HardwareRegister::getBitString(const Chip & i_chip) const
 {
     // Verify this register belongs on i_chip.
-    verifyAccessorChip( i_chip );
+    verifyAccessorChip(i_chip);
 
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
@@ -33,21 +33,21 @@
     // will be created in the cache, if it does not exist, when the cache is
     // accessed below.
 
-    if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
-         ( REG_ACCESS_WO   != getAccessLevel() ) )
+    if ((REG_ACCESS_NONE != getAccessLevel()) &&
+        (REG_ACCESS_WO   != getAccessLevel()))
     {
-        read( i_chip );
+        read(i_chip);
     }
 
-    return &( accessCache(i_chip) );
+    return &(accessCache(i_chip));
 }
 
 //------------------------------------------------------------------------------
 
-BitString & HardwareRegister::accessBitString( const Chip & i_chip )
+BitString & HardwareRegister::accessBitString(const Chip & i_chip)
 {
     // Verify this register belongs on i_chip.
-    verifyAccessorChip( i_chip );
+    verifyAccessorChip(i_chip);
 
     // Calling read() will ensure that an entry exists in the cache and the
     // entry has at been synched with hardware at least once. Note that we
@@ -55,52 +55,52 @@
     // will be created in the cache, if it does not exist, when the cache is
     // accessed below.
 
-    if ( ( REG_ACCESS_NONE != getAccessLevel() ) &&
-         ( REG_ACCESS_WO   != getAccessLevel() ) )
+    if ((REG_ACCESS_NONE != getAccessLevel()) &&
+        (REG_ACCESS_WO   != getAccessLevel()))
     {
-        read( i_chip );
+        read(i_chip);
     }
 
-    return accessCache( i_chip );
+    return accessCache(i_chip);
 }
 
 //------------------------------------------------------------------------------
 
-ReturnCode HardwareRegister::read( const Chip & i_chip, bool i_force ) const
+ReturnCode HardwareRegister::read(const Chip & i_chip, bool i_force) const
 {
     ReturnCode rc;
 
     // Verify this register belongs on i_chip.
-    verifyAccessorChip( i_chip );
+    verifyAccessorChip(i_chip);
 
     // Read from hardware only if the read is forced or the entry for this
     // instance does not exist in the cache.
-    if ( i_force || !queryCache(i_chip) )
+    if (i_force || !queryCache(i_chip))
     {
         // This register must be readable.
-        HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
-                    ( REG_ACCESS_WO   != getAccessLevel() ) );
+        HEI_ASSERT((REG_ACCESS_NONE != getAccessLevel()) &&
+                   (REG_ACCESS_WO   != getAccessLevel()));
 
         // Get the buffer from the register cache.
-        BitString & bs = accessCache( i_chip );
+        BitString & bs = accessCache(i_chip);
 
         // Get the byte size of the buffer.
-        size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
+        size_t sz_buffer = BitString::getMinBytes(bs.getBitLen());
 
         // Read this register from hardware.
-        rc = registerRead( i_chip.getChip(), bs.getBufAddr(),
-                           sz_buffer, getRegisterType(), getAddress() );
-        if ( RC_SUCCESS != rc )
+        rc = registerRead(i_chip.getChip(), bs.getBufAddr(), sz_buffer,
+                          getRegisterType(), getAddress());
+        if (RC_SUCCESS != rc)
         {
             // The read failed and we can't trust what was put in the register
             // cache. So remove this instance's entry from the cache.
-            flush( i_chip );
+            flush(i_chip);
         }
         else
         {
             // Sanity check. The returned size of the data written to the buffer
             // should match the register size.
-            HEI_ASSERT( getSize() == sz_buffer );
+            HEI_ASSERT(getSize() == sz_buffer);
         }
     }
 
@@ -111,35 +111,35 @@
 
 #ifndef __HEI_READ_ONLY
 
-ReturnCode HardwareRegister::write( const Chip & i_chip ) const
+ReturnCode HardwareRegister::write(const Chip & i_chip) const
 {
     ReturnCode rc;
 
     // Verify this register belongs on i_chip.
-    verifyAccessorChip( i_chip );
+    verifyAccessorChip(i_chip);
 
     // This register must be writable.
-    HEI_ASSERT( ( REG_ACCESS_NONE != getAccessLevel() ) &&
-                ( REG_ACCESS_RO   != getAccessLevel() ) );
+    HEI_ASSERT((REG_ACCESS_NONE != getAccessLevel()) &&
+               (REG_ACCESS_RO   != getAccessLevel()));
 
     // An entry for this register must exist in the cache.
-    HEI_ASSERT( queryCache(i_chip) );
+    HEI_ASSERT(queryCache(i_chip));
 
     // Get the buffer from the register cache.
-    BitString & bs = accessCache( i_chip );
+    BitString & bs = accessCache(i_chip);
 
     // Get the byte size of the buffer.
-    size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
+    size_t sz_buffer = BitString::getMinBytes(bs.getBitLen());
 
     // Write to this register to hardware.
-    rc = registerWrite( i_chip.getChip(), bs.getBufAddr(),
-                        sz_buffer, getRegisterType(), getAddress() );
+    rc = registerWrite(i_chip.getChip(), bs.getBufAddr(),
+                       sz_buffer, getRegisterType(), getAddress());
 
-    if ( RC_SUCCESS == rc )
+    if (RC_SUCCESS == rc)
     {
         // Sanity check. The returned size of the data written to the buffer
         // should match the register size.
-        HEI_ASSERT( getSize() == sz_buffer );
+        HEI_ASSERT(getSize() == sz_buffer);
     }
 
     return rc;
@@ -153,18 +153,18 @@
 
 //------------------------------------------------------------------------------
 
-bool HardwareRegister::Cache::query( const Chip & i_chip,
-                                     const HardwareRegister * i_hwReg ) const
+bool HardwareRegister::Cache::query(const Chip & i_chip,
+                                    const HardwareRegister * i_hwReg) const
 {
     // Does i_chip exist in the cache?
-    auto chipPairItr = iv_cache.find( i_chip );
-    if ( iv_cache.end() != chipPairItr )
+    auto chipPairItr = iv_cache.find(i_chip);
+    if (iv_cache.end() != chipPairItr)
     {
         auto & hwRegMap = chipPairItr->second; // for ease of use
 
         // Does i_hwReg exist in the cache?
-        auto hwRegPairItr = hwRegMap.find( i_hwReg );
-        if ( hwRegMap.end() != hwRegPairItr )
+        auto hwRegPairItr = hwRegMap.find(i_hwReg);
+        if (hwRegMap.end() != hwRegPairItr)
         {
             return true;
         }
@@ -175,11 +175,11 @@
 
 //------------------------------------------------------------------------------
 
-BitString & HardwareRegister::Cache::access( const Chip & i_chip,
-                                             const HardwareRegister * i_hwReg )
+BitString & HardwareRegister::Cache::access(const Chip & i_chip,
+                                            const HardwareRegister * i_hwReg)
 {
     // If the entry does not exist, create a new entry.
-    if ( !query(i_chip, i_hwReg) )
+    if (!query(i_chip, i_hwReg))
     {
         BitString * bs = new BitStringBuffer { i_hwReg->getSize() * 8 };
         iv_cache[i_chip][i_hwReg] = bs;
@@ -194,9 +194,9 @@
 void HardwareRegister::Cache::flush()
 {
     // Delete all of the BitStrings.
-    for ( auto & chipPair : iv_cache )
+    for (auto & chipPair : iv_cache)
     {
-        for ( auto & hwRegPair : chipPair.second )
+        for (auto & hwRegPair : chipPair.second)
         {
             delete hwRegPair.second;
         }
@@ -211,18 +211,18 @@
 
 //------------------------------------------------------------------------------
 
-void HardwareRegister::Cache::flush( const Chip & i_chip,
-                                     const HardwareRegister * i_hwReg )
+void HardwareRegister::Cache::flush(const Chip & i_chip,
+                                    const HardwareRegister * i_hwReg)
 {
     // Does i_chip exist in the cache?
-    auto chipPairItr = iv_cache.find( i_chip );
-    if ( iv_cache.end() != chipPairItr )
+    auto chipPairItr = iv_cache.find(i_chip);
+    if (iv_cache.end() != chipPairItr)
     {
         auto & hwRegMap = chipPairItr->second; // for ease of use
 
         // Does i_hwReg exist in the cache?
-        auto hwRegPairItr = hwRegMap.find( i_hwReg );
-        if ( hwRegMap.end() != hwRegPairItr )
+        auto hwRegPairItr = hwRegMap.find(i_hwReg);
+        if (hwRegMap.end() != hwRegPairItr)
         {
             delete hwRegPairItr->second; // delete the BitString
             hwRegMap.erase(i_hwReg);     // remove the entry for this register
@@ -230,7 +230,7 @@
 
         // If i_hwReg was the only entry for i_chip, we can remove i_chip from
         // the cache.
-        if ( hwRegMap.empty() )
+        if (hwRegMap.empty())
         {
             iv_cache.erase(i_chip);
         }
@@ -240,4 +240,3 @@
 //------------------------------------------------------------------------------
 
 } // end namespace libhei
-
diff --git a/src/register/hei_hardware_register.hpp b/src/register/hei_hardware_register.hpp
index ead7b16..ab1c66e 100755
--- a/src/register/hei_hardware_register.hpp
+++ b/src/register/hei_hardware_register.hpp
@@ -50,11 +50,11 @@
      * @param i_instance    Instance of this register
      * @param i_accessLevel Hardware access level for this register.
      */
-    HardwareRegister( ChipType_t i_chipType, RegisterId_t i_id,
-                      RegisterInstance_t i_instance,
-                      RegisterAccessLevel_t i_accessLevel ) :
-        Register(), iv_chipType( i_chipType ), iv_id( i_id ),
-        iv_instance( i_instance ), iv_accessLevel( i_accessLevel )
+    HardwareRegister(ChipType_t i_chipType, RegisterId_t i_id,
+                     RegisterInstance_t i_instance,
+                     RegisterAccessLevel_t i_accessLevel) :
+        Register(), iv_chipType(i_chipType), iv_id(i_id),
+        iv_instance(i_instance), iv_accessLevel(i_accessLevel)
     {}
 
   private: // Instance variables
@@ -102,31 +102,31 @@
   public: // Operators
 
     /** @brief Equals operator. */
-    bool operator==( const HardwareRegister & i_r ) const
+    bool operator==(const HardwareRegister & i_r) const
     {
         // Comparing register type, chip type, and address should be sufficient.
-        return ( getRegisterType() == i_r.getRegisterType() ) &&
-               ( getChipType()     == i_r.getChipType()     ) &&
-               ( getAddress()      == i_r.getAddress()      );
+        return (getRegisterType() == i_r.getRegisterType()) &&
+               (getChipType()     == i_r.getChipType()    ) &&
+               (getAddress()      == i_r.getAddress()     );
     }
 
     /** @brief Less than operator. */
-    bool operator<( const HardwareRegister & i_r ) const
+    bool operator<(const HardwareRegister & i_r) const
     {
         // Comparing register type, chip type, and address should be sufficient.
-        if ( getRegisterType() < i_r.getRegisterType() )
+        if (getRegisterType() < i_r.getRegisterType())
         {
             return true;
         }
-        else if ( getRegisterType() == i_r.getRegisterType() )
+        else if (getRegisterType() == i_r.getRegisterType())
         {
-            if ( getChipType() < i_r.getChipType() )
+            if (getChipType() < i_r.getChipType())
             {
                 return true;
             }
-            else if ( getChipType() == i_r.getChipType() )
+            else if (getChipType() == i_r.getChipType())
             {
-                return ( getAddress() < i_r.getAddress() );
+                return (getAddress() < i_r.getAddress());
             }
         }
 
@@ -136,7 +136,7 @@
   public:
 
     /** Function overloaded from parent Register class. */
-    const BitString * getBitString( const Chip & i_chip ) const;
+    const BitString * getBitString(const Chip & i_chip) const;
 
 #if 0
     /**
@@ -157,9 +157,9 @@
      *                 read from hardware and update the cache.
      * @return See the return code from the registerRead() user interface API.
      */
-    ReturnCode read( const Chip & i_chip, bool i_force = false ) const;
+    ReturnCode read(const Chip & i_chip, bool i_force = false) const;
 
-    #ifndef __HEI_READ_ONLY
+#ifndef __HEI_READ_ONLY
 
     /**
      * @brief  Writes the value stored in the register cache to hardware via the
@@ -167,9 +167,9 @@
      * @param  i_chip  The target chip in which this register belongs.
      * @return See the return code from the registerWrite() user interface API.
      */
-    ReturnCode write( const Chip & i_chip ) const;
+    ReturnCode write(const Chip & i_chip) const;
 
-    #endif // __HEI_READ_ONLY
+#endif // __HEI_READ_ONLY
 
   protected:
 
@@ -182,14 +182,14 @@
      * @param  i_chip  The target chip in which this register belongs.
      * @return A reference to the BitString.
      */
-    BitString & accessBitString( const Chip & i_chip );
+    BitString & accessBitString(const Chip & i_chip);
 
   private: // Hardware accessor management functions.
 
     /** @brief Asserts this register belongs on the target accessor chip. */
-    void verifyAccessorChip( const Chip & i_chip ) const
+    void verifyAccessorChip(const Chip & i_chip) const
     {
-        HEI_ASSERT( getChipType() == i_chip.getType() );
+        HEI_ASSERT(getChipType() == i_chip.getType());
     }
 
   private: // Register cache class variable
@@ -212,10 +212,10 @@
         ~Cache() = default;
 
         /** @brief Copy constructor. */
-        Cache( const Cache & ) = delete;
+        Cache(const Cache &) = delete;
 
         /** @brief Assignment operator. */
-        Cache & operator=( const Cache & ) = delete;
+        Cache & operator=(const Cache &) = delete;
 
         /**
          * @brief  Queries if a specific entry exists in the cache.
@@ -223,8 +223,8 @@
          * @param  i_hwReg The target register.
          * @return True if the entry exists, false otherwise.
          */
-        bool query( const Chip & i_chip,
-                    const HardwareRegister * i_hwReg ) const;
+        bool query(const Chip & i_chip,
+                   const HardwareRegister * i_hwReg) const;
 
         /**
          * @brief  Returns the data buffer for the given chip and register.
@@ -234,8 +234,8 @@
          * @note   If an entry does not exist in the cache, an entry will be
          *         created and the BitString will be initialized to 0.
          */
-        BitString & access( const Chip & i_chip,
-                            const HardwareRegister * i_hwReg );
+        BitString & access(const Chip & i_chip,
+                           const HardwareRegister * i_hwReg);
 
         /** @brief Flushes entire contents from cache. */
         void flush();
@@ -245,7 +245,7 @@
          * @param i_chip  The target chip.
          * @param i_hwReg The target register.
          */
-        void flush( const Chip & i_chip, const HardwareRegister * i_hwReg );
+        void flush(const Chip & i_chip, const HardwareRegister * i_hwReg);
 
       private:
 
@@ -279,9 +279,9 @@
      * @brief Flushes this register from the cache.
      * @param  i_chip  The target chip in which this register belongs.
      */
-    void flush( const Chip & i_chip ) const
+    void flush(const Chip & i_chip) const
     {
-        cv_cache.flush( i_chip, this );
+        cv_cache.flush(i_chip, this);
     }
 
   private: // Register cache management functions.
@@ -290,20 +290,19 @@
      * @param  i_chip  The target chip in which this register belongs.
      * @return True if an entry for this register exist in this cache.
      */
-    bool queryCache( const Chip & i_chip ) const
+    bool queryCache(const Chip & i_chip) const
     {
-        return cv_cache.query( i_chip, this );
+        return cv_cache.query(i_chip, this);
     }
 
     /**
      * @param  i_chip  The target chip in which this register belongs.
      * @return A reference to this register's BitString in cache.
      */
-    BitString & accessCache( const Chip & i_chip ) const
+    BitString & accessCache(const Chip & i_chip) const
     {
-        return cv_cache.access( i_chip, this );
+        return cv_cache.access(i_chip, this);
     }
 };
 
 } // end namespace libhei
-
diff --git a/src/register/hei_register.hpp b/src/register/hei_register.hpp
index 2a5c6ef..4514c28 100755
--- a/src/register/hei_register.hpp
+++ b/src/register/hei_register.hpp
@@ -17,7 +17,7 @@
 
 Register * fir = new HardwareRegister(REG_ADDRESS, REG_WIDTH,
                                       CHIP_TYPE, ACCESS_RO);
-Register * mask = new ConstantRegister( 0xffffffff00000000 );
+Register * mask = new ConstantRegister(0xffffffff00000000);
 Register * fir_mask = new AndRegister(fir, mask);
 const BitString * bs = fir_mask->getBitString(chip);
 
@@ -37,10 +37,10 @@
      * @param  i_chip Indicates which chip to access for this register.
      * @return A BitString containing the value of this register.
      */
-    virtual const BitString * getBitString( const Chip & i_chip ) const = 0;
+    virtual const BitString * getBitString(const Chip & i_chip) const = 0;
 };
 
 // Pure virtual destructor must be defined.
 inline Register::~Register() {}
 
-}//end namespace libhei
+} // end namespace libhei
diff --git a/src/register/hei_scom_register.hpp b/src/register/hei_scom_register.hpp
index 04fd124..c90d5be 100644
--- a/src/register/hei_scom_register.hpp
+++ b/src/register/hei_scom_register.hpp
@@ -25,11 +25,11 @@
      * @param i_accessLevel Hardware access level for this register.
      * @param i_address     A 4-byte address for this SCOM register.
      */
-    ScomRegister( ChipType_t i_chipType, RegisterId_t i_id,
-                  RegisterInstance_t i_instance,
-                  RegisterAccessLevel_t i_accessLevel, uint32_t i_address ) :
-        HardwareRegister( i_chipType, i_id, i_instance, i_accessLevel ),
-        iv_address( i_address )
+    ScomRegister(ChipType_t i_chipType, RegisterId_t i_id,
+                 RegisterInstance_t i_instance,
+                 RegisterAccessLevel_t i_accessLevel, uint32_t i_address) :
+        HardwareRegister(i_chipType, i_id, i_instance, i_accessLevel),
+        iv_address(i_address)
     {}
 
     /** @brief Destructor. */
@@ -46,7 +46,7 @@
      *
      * Needed by Flyweight class, but should not be allowed in general.
      */
-    ScomRegister( const ScomRegister & ) = default;
+    ScomRegister(const ScomRegister &) = default;
 
     /**
      * @brief Explicitly disables assignment operator.
@@ -55,7 +55,7 @@
      * of the constant instance variables, but helps communicate it is not
      * allowed.
      */
-    ScomRegister & operator=( const ScomRegister & ) = delete;
+    ScomRegister & operator=(const ScomRegister &) = delete;
 
   public: // Accessor functions
 
@@ -65,7 +65,7 @@
     /** Function overloaded from parent HardwareRegister class. */
     RegisterAddress_t getAddress() const
     {
-        return static_cast<RegisterAddress_t>( iv_address );
+        return static_cast<RegisterAddress_t>(iv_address);
     }
 
     /** Function overloaded from parent HardwareRegister class. */
@@ -104,11 +104,11 @@
      * @param i_accessLevel Hardware access level for this register.
      * @param i_address     An 8-byte address for this Indirect SCOM register.
      */
-    IdScomRegister( ChipType_t i_chipType, RegisterId_t i_id,
-                    RegisterInstance_t i_instance,
-                    RegisterAccessLevel_t i_accessLevel, uint64_t i_address ) :
-        HardwareRegister( i_chipType, i_id, i_instance, i_accessLevel ),
-        iv_address( i_address )
+    IdScomRegister(ChipType_t i_chipType, RegisterId_t i_id,
+                   RegisterInstance_t i_instance,
+                   RegisterAccessLevel_t i_accessLevel, uint64_t i_address) :
+        HardwareRegister(i_chipType, i_id, i_instance, i_accessLevel),
+        iv_address(i_address)
     {}
 
     /** @brief Destructor. */
@@ -125,7 +125,7 @@
      *
      * Needed by Flyweight class, but should not be allowed in general.
      */
-    IdScomRegister( const IdScomRegister & ) = default;
+    IdScomRegister(const IdScomRegister &) = default;
 
     /**
      * @brief Explicitly disables assignment operator.
@@ -134,7 +134,7 @@
      * of the constant instance variables, but helps communicate it is not
      * allowed.
      */
-    IdScomRegister & operator=( const IdScomRegister & ) = delete;
+    IdScomRegister & operator=(const IdScomRegister &) = delete;
 
   public: // Accessor functions
 
@@ -144,7 +144,7 @@
     /** Function overloaded from parent HardwareRegister class. */
     RegisterAddress_t getAddress() const
     {
-        return static_cast<RegisterAddress_t>( iv_address );
+        return static_cast<RegisterAddress_t>(iv_address);
     }
 
     /** Function overloaded from parent HardwareRegister class. */
@@ -158,4 +158,3 @@
 }; // end class IdScomRegister
 
 } // end namespace libhei
-