Add handling for bit 2 in all recoverable chiplet FIRs
Bit 2 in the recoverable chiplet FIRs is a special bit that indicates
there is a unit checkstop on that chiplet as well. If we ignore that bit
like we were and there was a unit checkstop attention with no
recoverable attentions, the isolator will return signatures from the
GFIR which will just confuse things.
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ic340c0e765f266b2980561913df8c64461febcba
diff --git a/xml/p10/node_cfir_n0_cs.xml b/xml/p10/node_cfir_n0_cs.xml
new file mode 100644
index 0000000..3e1241e
--- /dev/null
+++ b/xml/p10/node_cfir_n0_cs.xml
@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<attn_node model_ec="P10_10,P10_20" name="CFIR_N0_CS" reg_type="SCOM">
+ <register name="CFIR_N0_CS">
+ <instance addr="0x02040000" reg_inst="0"/>
+ </register>
+ <register name="CFIR_N0_CS_MASK">
+ <instance addr="0x02040040" reg_inst="0"/>
+ </register>
+ <rule attn_type="CS" node_inst="0">
+ <expr type="and">
+ <expr type="reg" value1="CFIR_N0_CS"/>
+ <expr type="not">
+ <expr type="reg" value1="CFIR_N0_CS_MASK"/>
+ </expr>
+ <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
+ </expr>
+ </rule>
+ <bit child_node="N0_LOCAL_FIR" node_inst="0" pos="4">Attention from N0_LOCAL_FIR</bit>
+ <bit child_node="NMMU_CQ_FIR" node_inst="0" pos="5">Attention from NMMU_CQ_FIR 0</bit>
+ <bit child_node="NMMU_FIR" node_inst="0" pos="6">Attention from NMMU_FIR 0</bit>
+ <bit child_node="INT_CQ_FIR" node_inst="0" pos="7">Attention from INT_CQ_FIR</bit>
+ <bit child_node="VAS_FIR" node_inst="0" pos="8">Attention from VAS_FIR</bit>
+ <bit child_node="NX_DMA_ENG_FIR" node_inst="0" pos="9">Attention from NX_DMA_ENG_FIR</bit>
+ <bit child_node="NX_CQ_FIR" node_inst="0" pos="10">Attention from NX_CQ_FIR</bit>
+ <bit child_node="PCI_NEST_FIR" node_inst="3" pos="13">Attention from PCI_NEST_FIR 3</bit>
+ <bit child_node="PCI_NEST_FIR" node_inst="4" pos="14">Attention from PCI_NEST_FIR 4</bit>
+ <bit child_node="PCI_NEST_FIR" node_inst="5" pos="15">Attention from PCI_NEST_FIR 5</bit>
+</attn_node>