{
    "version": 1,
    "model_ec": ["P10_10"],
    "registers": {
        "EQ_CORE_FIR": {
            "instances": {
                "0": "0x20028440",
                "1": "0x20024440",
                "2": "0x20022440",
                "3": "0x20021440",
                "4": "0x21028440",
                "5": "0x21024440",
                "6": "0x21022440",
                "7": "0x21021440",
                "8": "0x22028440",
                "9": "0x22024440",
                "10": "0x22022440",
                "11": "0x22021440",
                "12": "0x23028440",
                "13": "0x23024440",
                "14": "0x23022440",
                "15": "0x23021440",
                "16": "0x24028440",
                "17": "0x24024440",
                "18": "0x24022440",
                "19": "0x24021440",
                "20": "0x25028440",
                "21": "0x25024440",
                "22": "0x25022440",
                "23": "0x25021440",
                "24": "0x26028440",
                "25": "0x26024440",
                "26": "0x26022440",
                "27": "0x26021440",
                "28": "0x27028440",
                "29": "0x27024440",
                "30": "0x27022440",
                "31": "0x27021440"
            }
        },
        "EQ_CORE_FIR_MASK": {
            "instances": {
                "0": "0x20028443",
                "1": "0x20024443",
                "2": "0x20022443",
                "3": "0x20021443",
                "4": "0x21028443",
                "5": "0x21024443",
                "6": "0x21022443",
                "7": "0x21021443",
                "8": "0x22028443",
                "9": "0x22024443",
                "10": "0x22022443",
                "11": "0x22021443",
                "12": "0x23028443",
                "13": "0x23024443",
                "14": "0x23022443",
                "15": "0x23021443",
                "16": "0x24028443",
                "17": "0x24024443",
                "18": "0x24022443",
                "19": "0x24021443",
                "20": "0x25028443",
                "21": "0x25024443",
                "22": "0x25022443",
                "23": "0x25021443",
                "24": "0x26028443",
                "25": "0x26024443",
                "26": "0x26022443",
                "27": "0x26021443",
                "28": "0x27028443",
                "29": "0x27024443",
                "30": "0x27022443",
                "31": "0x27021443"
            }
        },
        "EQ_CORE_FIR_ACT0": {
            "instances": {
                "0": "0x20028446",
                "1": "0x20024446",
                "2": "0x20022446",
                "3": "0x20021446",
                "4": "0x21028446",
                "5": "0x21024446",
                "6": "0x21022446",
                "7": "0x21021446",
                "8": "0x22028446",
                "9": "0x22024446",
                "10": "0x22022446",
                "11": "0x22021446",
                "12": "0x23028446",
                "13": "0x23024446",
                "14": "0x23022446",
                "15": "0x23021446",
                "16": "0x24028446",
                "17": "0x24024446",
                "18": "0x24022446",
                "19": "0x24021446",
                "20": "0x25028446",
                "21": "0x25024446",
                "22": "0x25022446",
                "23": "0x25021446",
                "24": "0x26028446",
                "25": "0x26024446",
                "26": "0x26022446",
                "27": "0x26021446",
                "28": "0x27028446",
                "29": "0x27024446",
                "30": "0x27022446",
                "31": "0x27021446"
            }
        },
        "EQ_CORE_FIR_ACT1": {
            "instances": {
                "0": "0x20028447",
                "1": "0x20024447",
                "2": "0x20022447",
                "3": "0x20021447",
                "4": "0x21028447",
                "5": "0x21024447",
                "6": "0x21022447",
                "7": "0x21021447",
                "8": "0x22028447",
                "9": "0x22024447",
                "10": "0x22022447",
                "11": "0x22021447",
                "12": "0x23028447",
                "13": "0x23024447",
                "14": "0x23022447",
                "15": "0x23021447",
                "16": "0x24028447",
                "17": "0x24024447",
                "18": "0x24022447",
                "19": "0x24021447",
                "20": "0x25028447",
                "21": "0x25024447",
                "22": "0x25022447",
                "23": "0x25021447",
                "24": "0x26028447",
                "25": "0x26024447",
                "26": "0x26022447",
                "27": "0x26021447",
                "28": "0x27028447",
                "29": "0x27024447",
                "30": "0x27022447",
                "31": "0x27021447"
            }
        },
        "EQ_CORE_FIR_WOF": {
            "instances": {
                "0": "0x20028448",
                "1": "0x20024448",
                "2": "0x20022448",
                "3": "0x20021448",
                "4": "0x21028448",
                "5": "0x21024448",
                "6": "0x21022448",
                "7": "0x21021448",
                "8": "0x22028448",
                "9": "0x22024448",
                "10": "0x22022448",
                "11": "0x22021448",
                "12": "0x23028448",
                "13": "0x23024448",
                "14": "0x23022448",
                "15": "0x23021448",
                "16": "0x24028448",
                "17": "0x24024448",
                "18": "0x24022448",
                "19": "0x24021448",
                "20": "0x25028448",
                "21": "0x25024448",
                "22": "0x25022448",
                "23": "0x25021448",
                "24": "0x26028448",
                "25": "0x26024448",
                "26": "0x26022448",
                "27": "0x26021448",
                "28": "0x27028448",
                "29": "0x27024448",
                "30": "0x27022448",
                "31": "0x27021448"
            }
        }
    },
    "isolation_nodes": {
        "EQ_CORE_FIR": {
            "instances": [
                0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
                18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
            ],
            "rules": [
                {
                    "attn_type": ["CS"],
                    "node_inst": [
                        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
                        16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
                        30, 31
                    ],
                    "expr": {
                        "expr_type": "and",
                        "exprs": [
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR"
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_MASK"
                                }
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_ACT0"
                                }
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_ACT1"
                                }
                            }
                        ]
                    }
                },
                {
                    "attn_type": ["RE"],
                    "node_inst": [
                        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
                        16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
                        30, 31
                    ],
                    "expr": {
                        "expr_type": "and",
                        "exprs": [
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR_WOF"
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_MASK"
                                }
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_ACT0"
                                }
                            },
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR_ACT1"
                            }
                        ]
                    }
                },
                {
                    "attn_type": ["UCS"],
                    "node_inst": [
                        0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
                        16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
                        30, 31
                    ],
                    "expr": {
                        "expr_type": "and",
                        "exprs": [
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR"
                            },
                            {
                                "expr_type": "not",
                                "expr": {
                                    "expr_type": "reg",
                                    "reg_name": "EQ_CORE_FIR_MASK"
                                }
                            },
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR_ACT0"
                            },
                            {
                                "expr_type": "reg",
                                "reg_name": "EQ_CORE_FIR_ACT1"
                            }
                        ]
                    }
                }
            ],
            "bits": {
                "0": {
                    "desc": "IFU SRAM recoverable error (ICACHE parity error, etc)"
                },
                "1": {
                    "desc": "TC checkstop"
                },
                "2": {
                    "desc": "IFU RegFile recoverable error"
                },
                "3": {
                    "desc": "IFU RegFile core checkstop"
                },
                "4": {
                    "desc": "IFU logic recoverable error"
                },
                "5": {
                    "desc": "IFU logic core checkstop"
                },
                "6": {
                    "desc": "reserved"
                },
                "7": {
                    "desc": "VSU Inference Accumulator recoverable error"
                },
                "8": {
                    "desc": "Recovery core checkstop"
                },
                "9": {
                    "desc": "VSU Slice Targeted File (STF) recoverable error"
                },
                "10": {
                    "desc": "reserved"
                },
                "11": {
                    "desc": "ISU logic recoverable error"
                },
                "12": {
                    "desc": "ISU logic core checkstop"
                },
                "13": {
                    "desc": "ISU recoverable if not in MT window"
                },
                "14": {
                    "desc": "MCHK received while ME=0 - non recoverable"
                },
                "15": {
                    "desc": "UE from L2"
                },
                "16": {
                    "desc": "Number of UEs from L2 above threshold"
                },
                "17": {
                    "desc": "UE on CI load"
                },
                "18": {
                    "desc": "MMU TLB parity recoverable error"
                },
                "19": {
                    "desc": "MMU SLB parity recoverable error"
                },
                "20": {
                    "desc": "reserved"
                },
                "21": {
                    "desc": "MMU CXT recoverable error"
                },
                "22": {
                    "desc": "MMU logic core checkstop"
                },
                "23": {
                    "desc": "MMU system checkstop"
                },
                "24": {
                    "desc": "VSU logic recoverable error"
                },
                "25": {
                    "desc": "VSU logic core checkstop"
                },
                "26": {
                    "desc": "Thread in maintenance mode and receives recovery request"
                },
                "27": {
                    "desc": "reserved"
                },
                "28": {
                    "desc": "PC system checkstop - Recoverable error received when recovery disabled"
                },
                "29": {
                    "desc": "LSU SRAM recoverable error (DCACHE parity error, ERAT parity error, etc)"
                },
                "30": {
                    "desc": "LSU set deleted"
                },
                "31": {
                    "desc": "LSU RegFile recoverable error"
                },
                "32": {
                    "desc": "LSU RegFile core checkstop"
                },
                "33": {
                    "desc": "MMU TLB multi hit error occurred"
                },
                "34": {
                    "desc": "MMU SLB multi hit error occurred"
                },
                "35": {
                    "desc": "LSU ERAT multi hit error occurred"
                },
                "36": {
                    "desc": "PC forward progress error"
                },
                "37": {
                    "desc": "LSU logic recoverable error"
                },
                "38": {
                    "desc": "LSU logic core checkstop"
                },
                "39": {
                    "desc": "reserved"
                },
                "40": {
                    "desc": "reserved"
                },
                "41": {
                    "desc": "LSU system checkstop"
                },
                "42": {
                    "desc": "reserved"
                },
                "43": {
                    "desc": "PC thread hang recoverable error"
                },
                "44": {
                    "desc": "reserved"
                },
                "45": {
                    "desc": "PC logic checkstop"
                },
                "46": {
                    "desc": "PC TimeBase Facility checkstop"
                },
                "47": {
                    "desc": "PC TimeBase Facility checkstop"
                },
                "48": {
                    "desc": "reserved"
                },
                "49": {
                    "desc": "reserved"
                },
                "50": {
                    "desc": "reserved"
                },
                "51": {
                    "desc": "reserved"
                },
                "52": {
                    "desc": "Hang Recovery Failed"
                },
                "53": {
                    "desc": "Core Hang detected"
                },
                "54": {
                    "desc": "reserved"
                },
                "55": {
                    "desc": "Nest Hang detected"
                },
                "56": {
                    "desc": "Other Core Chiplet recoverable error"
                },
                "57": {
                    "desc": "Other Core Chiplet core checkstop"
                },
                "58": {
                    "desc": "Other Core Chiplet system checkstop"
                },
                "59": {
                    "desc": "SCOM satellite error detected"
                },
                "60": {
                    "desc": "Debug Trigger error inject"
                },
                "61": {
                    "desc": "SCOM or Firmware recoverable error inject"
                },
                "62": {
                    "desc": "Firmware checkstop error inject"
                },
                "63": {
                    "desc": "PHYP checkstop via SPRC/SPRD"
                }
            },
            "capture_groups": [
                {
                    "group_name": "EQ_CORE_FIR",
                    "group_inst": {
                        "0": 0,
                        "1": 1,
                        "2": 2,
                        "3": 3,
                        "4": 4,
                        "5": 5,
                        "6": 6,
                        "7": 7,
                        "8": 8,
                        "9": 9,
                        "10": 10,
                        "11": 11,
                        "12": 12,
                        "13": 13,
                        "14": 14,
                        "15": 15,
                        "16": 16,
                        "17": 17,
                        "18": 18,
                        "19": 19,
                        "20": 20,
                        "21": 21,
                        "22": 22,
                        "23": 23,
                        "24": 24,
                        "25": 25,
                        "26": 26,
                        "27": 27,
                        "28": 28,
                        "29": 29,
                        "30": 30,
                        "31": 31
                    }
                }
            ]
        }
    }
}