Chip data file updates for TP and N0 chiplet
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ic2b5f2db286b08eb8d6a69ed8f43f6b86a7f2063
diff --git a/xml/p10/node_nx_cq_fir.xml b/xml/p10/node_nx_cq_fir.xml
index d6c70ef..f54716f 100644
--- a/xml/p10/node_nx_cq_fir.xml
+++ b/xml/p10/node_nx_cq_fir.xml
@@ -6,6 +6,16 @@
<action attn_type="RE" config="01"/>
<action attn_type="UCS" config="11"/>
</local_fir>
+ <register name="NX_CQ_ERR_RPT_0">
+ <instance addr="0x020110A2" reg_inst="0"/>
+ </register>
+ <register name="NX_CQ_ERR_RPT_1">
+ <instance addr="0x020110A1" reg_inst="0"/>
+ </register>
+ <capture_group node_inst="0">
+ <capture_register reg_inst="0" reg_name="NX_CQ_ERR_RPT_0" />
+ <capture_register reg_inst="0" reg_name="NX_CQ_ERR_RPT_1" />
+ </capture_group>
<bit pos="0">PBI internal parity error</bit>
<bit pos="1">PowerBus CE error</bit>
<bit pos="2">PowerBus UE error</bit>