Chip data file updates for TP and N0 chiplet
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ic2b5f2db286b08eb8d6a69ed8f43f6b86a7f2063
diff --git a/xml/p10/node_vas_fir.xml b/xml/p10/node_vas_fir.xml
index d64212d..ce1311e 100644
--- a/xml/p10/node_vas_fir.xml
+++ b/xml/p10/node_vas_fir.xml
@@ -20,7 +20,7 @@
<bit pos="11">Correctable ECC error detected in WC logic</bit>
<bit pos="12">Correctable ECC error detected in RG logic</bit>
<bit pos="13">ECC Correctable Error detected on CQ outbound PowerBus interface</bit>
- <bit pos="14">ECC UNCorrectable Error detected on CQ outbound PowerBus interface</bit>
+ <bit pos="14">ECC Uncorrectable Error detected on CQ outbound PowerBus interface</bit>
<bit pos="15">PowerBus state machine hang detected in CQ logic</bit>
<bit pos="16">Uncorrectable ECC error detected in Egress logic</bit>
<bit pos="17">Uncorrectable ECC error detected in Ingress logic</bit>
@@ -29,7 +29,7 @@
<bit pos="20">Uncorrectable ECC error detected in RG logic</bit>
<bit pos="21">Parity error detected in Ingress logic</bit>
<bit pos="22">Software cast error detected in Ingress logic</bit>
- <bit pos="23">VAS attempted to access a memory address which has the secure memory bit set</bit>
+ <bit pos="23">reserved</bit>
<bit pos="24">ECC sue error detected in Egress logic</bit>
<bit pos="25">ECC sue error detected in Ingress logic</bit>
<bit pos="26">ECC sue error detected in CQ logic</bit>
@@ -44,18 +44,18 @@
<bit pos="35">Address error detected on OS MMIO write</bit>
<bit pos="36">non-8-Byte MMIO detected by hypervisor</bit>
<bit pos="37">non-8-Byte MMIO detected by user or OS</bit>
- <bit pos="38">Unused - Was Write monitor operation attempted on a window that is not open</bit>
- <bit pos="39">Unused - Was Multiple write monotor registers match the same snooped PB operation</bit>
- <bit pos="40">Unused - Was Page Migration Register is not valid</bit>
- <bit pos="41">Unused - Was Page Migration Register size does not match corresponding FIFO</bit>
+ <bit pos="38">reserved</bit>
+ <bit pos="39">reserved</bit>
+ <bit pos="40">reserved</bit>
+ <bit pos="41">reserved</bit>
<bit pos="42">ASB_Notify sent but not claimed and interrupts were disabled in window context</bit>
- <bit pos="43">Unused - Was Write monitor operation hit a window which has notification disabled</bit>
- <bit pos="44">VAS rejected a PB paste command. See window status register for details</bit>
+ <bit pos="43">reserved</bit>
+ <bit pos="44">VAS rejected a PB paste command</bit>
<bit pos="45">VAS hung waiting for data from PowerBus</bit>
<bit pos="46">Incoming PowerBus parity error</bit>
<bit pos="47">HW error from SCOM Satellite 1</bit>
<bit pos="48">NX Local Checkstop</bit>
- <bit pos="49">SCOM MMIO address offset error. SCOM-initiated MMIO address did not decode to valid address.</bit>
+ <bit pos="49">SCOM MMIO address offset error</bit>
<bit pos="50">TopoID Error Bit</bit>
- <bit pos="51">Unused bit</bit>
+ <bit pos="51">spare</bit>
</attn_node>