diff --git a/test/simulator/testcases/eq_core_fir.cpp b/test/simulator/testcases/eq_core_fir.cpp
index 242d818..c7fa4f1 100644
--- a/test/simulator/testcases/eq_core_fir.cpp
+++ b/test/simulator/testcases/eq_core_fir.cpp
@@ -27,9 +27,9 @@
 REG_SCOM(proc0, 0x27024447, 0xBDDC26C5FE1300CC) // EQ_CORE_FIR_ACT1
 REG_SCOM(proc0, 0x27024448, 0x0000000000000080) // EQ_CORE_FIR_WOF
 
-EXP_SIG(proc0, 0x682c, 28, 1, CHECKSTOP)
-EXP_SIG(proc0, 0x682c, 28, 26, CHECKSTOP)
-EXP_SIG(proc0, 0x682c, 29, 63, CHECKSTOP)
+EXP_SIG(proc0, 0x682c, 28, 1, CHIP_CS)
+EXP_SIG(proc0, 0x682c, 28, 26, CHIP_CS)
+EXP_SIG(proc0, 0x682c, 29, 63, CHIP_CS)
 EXP_SIG(proc0, 0x682c, 28, 56, RECOVERABLE)
 EXP_SIG(proc0, 0x682c, 29, 56, RECOVERABLE)
 
diff --git a/test/simulator/testcases/sample_test_case.cpp b/test/simulator/testcases/sample_test_case.cpp
index 91fff43..0378fbd 100644
--- a/test/simulator/testcases/sample_test_case.cpp
+++ b/test/simulator/testcases/sample_test_case.cpp
@@ -68,27 +68,27 @@
 REG_SCOM(proc0, 0x0000f207, 0x5000000000000000) // LFIR2_ACT1 inst 0
 
 // LFIR0
-EXP_SIG(proc0, 0xa776, 0, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa776, 0, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa776, 0, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa776, 1, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa776, 1, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa776, 1, 1, RECOVERABLE)
 
 // LFIR1
-EXP_SIG(proc0, 0xa876, 0, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 0, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 0, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa876, 1, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 1, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 1, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa876, 2, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 2, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 2, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa876, 3, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 3, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 3, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa876, 4, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 4, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 4, 1, RECOVERABLE)
-EXP_SIG(proc0, 0xa876, 5, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa876, 5, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa876, 5, 1, RECOVERABLE)
 
 // LFIR2
-EXP_SIG(proc0, 0xa976, 0, 0, CHECKSTOP)
+EXP_SIG(proc0, 0xa976, 0, 0, CHIP_CS)
 EXP_SIG(proc0, 0xa976, 0, 1, RECOVERABLE)
 
 END_ITERATION
diff --git a/test/simulator/testcases/tod_fault.cpp b/test/simulator/testcases/tod_fault.cpp
index 1d03883..cebf4f3 100644
--- a/test/simulator/testcases/tod_fault.cpp
+++ b/test/simulator/testcases/tod_fault.cpp
@@ -18,7 +18,7 @@
 REG_SCOM(proc0, 0x00040032, 0xc000000000000000) // TOD_ERROR_MASK
 REG_SCOM(proc0, 0x00040033, 0xa000000000000000) // TOD_ERROR_ROUTING
 
-EXP_SIG(proc0, 0x7d9b, 0, 3, CHECKSTOP)
+EXP_SIG(proc0, 0x7d9b, 0, 3, CHIP_CS)
 EXP_SIG(proc0, 0xdf2a, 0, 26, RECOVERABLE)
 
 END_ITERATION