Add register cache support in HardwareRegister class
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ic671a099fdcd98d1f0158289ef321b968f1908ca
diff --git a/src/register/hei_hardware_register.cpp b/src/register/hei_hardware_register.cpp
index 5663f3b..58106bf 100755
--- a/src/register/hei_hardware_register.cpp
+++ b/src/register/hei_hardware_register.cpp
@@ -18,7 +18,6 @@
#include <iipchip.h>
#include <prdfMain.H>
#include <prdfRasServices.H>
-#include <prdfRegisterCache.H>
#include <prdfPlatServices.H>
#include <prdfExtensibleChip.H>
@@ -69,14 +68,16 @@
// Calling Read() will ensure that an entry exists in the cache and the
// entry has at been synched with hardware at least once. Note that we
// cannot read hardware for write-only registers. In this case, an entry
- // will be created in the cache, if it does not exist, when readCache() is
- // called below.
+ // will be created in the cache, if it does not exist, when the cache is
+ // read below.
+
if ( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_WO != iv_operationType ) )
+ ( ACCESS_WO != iv_operationType ) )
{
Read();
}
- return &(readCache());
+
+ return &( accessCache() );
}
//------------------------------------------------------------------------------
@@ -86,15 +87,16 @@
// Calling Read() will ensure that an entry exists in the cache and the
// entry has at been synched with hardware at least once. Note that we
// cannot read hardware for write-only registers. In this case, an entry
- // will be created in the cache, if it does not exist, when readCache() is
- // called below.
+ // will be created in the cache, if it does not exist, when the cache is
+ // read below.
+
if ( ( ACCESS_NONE != iv_operationType ) &&
- ( ACCESS_WO != iv_operationType ) )
+ ( ACCESS_WO != iv_operationType ) )
{
Read();
}
- return readCache();
+ return accessCache();
}
#endif
@@ -104,17 +106,17 @@
{
ReturnCode rc;
-#if 0
// Read from hardware only if the read is forced or the entry for this
// instance does not exist in the cache.
if ( i_force || !queryCache() )
{
+#if 0
// This register must be readable.
HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) &&
( ACCESS_WO != iv_operationType ) );
// Get the buffer from the register cache.
- BitString & bs = readCache();
+ BitString & bs = accessCache();
// Get the byte size of the buffer.
size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
@@ -122,20 +124,22 @@
// Read this register from hardware.
rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(),
sz_buffer, getRegisterType(), getAddress() );
+#endif
if ( RC_SUCCESS != rc )
{
// The read failed and we can't trust what was put in the register
// cache. So remove this instance's entry from the cache.
- flushCache( getAccessorChip() );
+ cv_cache.flush( getAccessorChip(), this );
}
+#if 0
else
{
// Sanity check. The returned size of the data written to the buffer
// should match the register size.
HEI_ASSERT( getSize() == sz_buffer );
}
- }
#endif
+ }
return rc;
}
@@ -157,7 +161,7 @@
HEI_ASSERT( queryCache() );
// Get the buffer from the register cache.
- BitString & bs = readCache();
+ BitString & bs = accessCache();
// Get the byte size of the buffer.
size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
@@ -182,38 +186,6 @@
#if 0
//------------------------------------------------------------------------------
-bool HardwareRegister::queryCache() const
-{
- RegDataCache & cache = RegDataCache::getCachedRegisters();
- BitString * bs = cache.queryCache( getAccessorChip(), this );
- return ( nullptr != bs );
-}
-
-//------------------------------------------------------------------------------
-
-BitString & HardwareRegister::readCache() const
-{
- RegDataCache & cache = RegDataCache::getCachedRegisters();
- return cache.read( getAccessorChip(), this );
-}
-
-//------------------------------------------------------------------------------
-
-void HardwareRegister::flushCache( ExtensibleChip *i_pChip ) const
-{
- RegDataCache & regDump = RegDataCache::getCachedRegisters();
- if( nullptr == i_pChip )
- {
- regDump.flush();
- }
- else
- {
- regDump.flush( i_pChip ,this );
- }
-}
-
-//-----------------------------------------------------------------------------
-
bool HardwareRegister::operator == ( const HardwareRegister & i_rightRegister ) const
{
if( iv_scomAddress == i_rightRegister.GetAddress() )
@@ -254,5 +226,95 @@
//------------------------------------------------------------------------------
+HardwareRegister::Cache HardwareRegister::cv_cache {};
+
+//------------------------------------------------------------------------------
+
+bool HardwareRegister::Cache::query( const Chip & i_chip,
+ const HardwareRegister * i_hwReg ) const
+{
+ // Does i_chip exist in the cache?
+ auto chipPairItr = iv_cache.find( i_chip );
+ if ( iv_cache.end() != chipPairItr )
+ {
+ auto & hwRegMap = chipPairItr->second; // for ease of use
+
+ // Does i_hwReg exist in the cache?
+ auto hwRegPairItr = hwRegMap.find( i_hwReg );
+ if ( hwRegMap.end() != hwRegPairItr )
+ {
+ return true;
+ }
+ }
+
+ return false;
+}
+
+//------------------------------------------------------------------------------
+
+BitString & HardwareRegister::Cache::access( const Chip & i_chip,
+ const HardwareRegister * i_hwReg )
+{
+ // If the entry does not exist, create a new entry.
+ if ( !query(i_chip, i_hwReg) )
+ {
+ BitString * bs = new BitStringBuffer { i_hwReg->getByteSize() * 8 };
+ iv_cache[i_chip][i_hwReg] = bs;
+ }
+
+ // Return a reference to the target entry.
+ return *(iv_cache[i_chip][i_hwReg]);
+}
+
+//------------------------------------------------------------------------------
+
+void HardwareRegister::Cache::flush()
+{
+ // Delete all of the BitStrings.
+ for ( auto & chipPair : iv_cache )
+ {
+ for ( auto & hwRegPair : chipPair.second )
+ {
+ delete hwRegPair.second;
+ }
+ }
+
+ // !!! Do not delete the HardwareRegisters !!!
+ // Those are deleted when the main uninitialize() API is called.
+
+ // Flush the rest of the cache.
+ iv_cache.clear();
+}
+
+//------------------------------------------------------------------------------
+
+void HardwareRegister::Cache::flush( const Chip & i_chip,
+ const HardwareRegister * i_hwReg )
+{
+ // Does i_chip exist in the cache?
+ auto chipPairItr = iv_cache.find( i_chip );
+ if ( iv_cache.end() != chipPairItr )
+ {
+ auto & hwRegMap = chipPairItr->second; // for ease of use
+
+ // Does i_hwReg exist in the cache?
+ auto hwRegPairItr = hwRegMap.find( i_hwReg );
+ if ( hwRegMap.end() != hwRegPairItr )
+ {
+ delete hwRegPairItr->second; // delete the BitString
+ hwRegMap.erase(i_hwReg); // remove the entry for this register
+ }
+
+ // If i_hwReg was the only entry for i_chip, we can remove i_chip from
+ // the cache.
+ if ( hwRegMap.empty() )
+ {
+ iv_cache.erase(i_chip);
+ }
+ }
+}
+
+//------------------------------------------------------------------------------
+
} // end namespace libhei
diff --git a/src/register/hei_hardware_register.hpp b/src/register/hei_hardware_register.hpp
index 066f6db..7588a6c 100755
--- a/src/register/hei_hardware_register.hpp
+++ b/src/register/hei_hardware_register.hpp
@@ -17,13 +17,6 @@
namespace libhei
{
-#if 0
-// Forward References
-class CHIP_CLASS;
-class MopsRegisterAccess;
-class ExtensibleChip;
-#endif
-
/**
* @brief Stores information (e.g. address, type, length, etc.) for an actual
* hardware register.
@@ -40,6 +33,20 @@
* - Perform all necessary hardware accesses to that chip.
* - Call HardwareRegister::clearAccessor() to remove the chip access. This
* helps ensure we don't try to access the wrong chip.
+ *
+ * Register cache:
+ *
+ * In order to save memory space, each instance of this class does not store
+ * the contents of the target hardware register. Instead, that data is stored
+ * in a register cache, which a static variable defined in this class. This
+ * allows us to store only what we need. The cache can also be thought of as a
+ * snapshot of the registers at the time of isolation, which can be useful if
+ * the hardware is still running and register values could change.
+ *
+ * In order to ensure stale data isn't used from the cache, call
+ * HardwareRegister::flushAll() before beginning isolation on a new attention.
+ * Also, HardwareRegister::flushAll() should be called when the isolator is
+ * uninitialized before the rest of the isolation objects are deleted.
*/
class HardwareRegister : public Register
{
@@ -95,6 +102,7 @@
*/
uint32_t GetBitLength(void) const { return iv_bitLength ;}
#endif
+ size_t getByteSize() const { return 8; } // TODO
/**
* @brief Reads a register from hardware via the user interface APIs.
@@ -196,22 +204,6 @@
friend class CaptureData;
- /** @return TRUE if entry for this register exist in this cache. */
- bool queryCache() const;
-
- /**
- * @brief Reads register contents from cache.
- * @return Reference to bit string buffer maintained in cache.
- */
- BitString & readCache() const;
-
- /**
- * @brief Deletes one or all entry in the cache
- * @param RuleChip pointer associated with register
- * @return Nil
- */
- void flushCache( ExtensibleChip *i_pChip = nullptr ) const;
-
private: // Data
uint32_t iv_bitLength; // bit length of scom
@@ -305,6 +297,103 @@
return cv_accessor->getChip();
}
+
+ private: // Register cache class variable
+
+ /**
+ * @brief Caches the contents of registers read from hardware.
+ *
+ * The goal is to create a snapshot of the hardware register contents as
+ * close to the reported attention as possible. This snapshot is then used
+ * for additional analysis/debug when needed.
+ */
+ class Cache
+ {
+ public:
+
+ /** @brief Default constructor. */
+ Cache() = default;
+
+ /** @brief Destructor. */
+ ~Cache() = default;
+
+ /** @brief Copy constructor. */
+ Cache( const Cache & ) = delete;
+
+ /** @brief Assignment operator. */
+ Cache & operator=( const Cache & ) = delete;
+
+ /**
+ * @brief Queries if a specific entry exists in the cache.
+ * @param i_chip The target chip.
+ * @param i_hwReg The target register.
+ * @return True if the entry exists, false otherwise.
+ */
+ bool query( const Chip & i_chip,
+ const HardwareRegister * i_hwReg ) const;
+
+ /**
+ * @brief Returns the data buffer for the given chip and register.
+ * @param i_chip The target chip.
+ * @param i_hwReg The target register.
+ * @return A reference to the BitString containing the register data.
+ * @note If an entry does not exist in the cache, an entry will be
+ * created and the BitString will be initialized to 0.
+ */
+ BitString & access( const Chip & i_chip,
+ const HardwareRegister * i_hwReg );
+
+ /** @brief Flushes entire contents from cache. */
+ void flush();
+
+ /**
+ * @brief Removes a single register from the cache.
+ * @param i_chip The target chip.
+ * @param i_hwReg The target register.
+ */
+ void flush( const Chip & i_chip, const HardwareRegister * i_hwReg );
+
+ private:
+
+ /**
+ * @brief Stores a BitStringBuffer for each HardwareRegister per Chip.
+ *
+ * The HardwareRegister keys will just be pointers to the isolation
+ * objects created in the main initialize() API. Those should exist
+ * until the main uninitialize() API is called. It is important that the
+ * cache is flushed at the beginning of the uninitialize() API before
+ * the rest of the isolation objects are deleted.
+ *
+ * The Chip keys are copies of the objects passed to the isolator
+ * because the user application is responsible for storage of the
+ * objects passed to the isolator. We don't want to chance a Chip was
+ * created as a local variable that goes out of scope, or other similar
+ * situations.
+ */
+ std::map<Chip, std::map<const HardwareRegister*, BitString*>> iv_cache;
+ };
+
+ /** This allows all HardwareRegister objects access to the cache. */
+ static Cache cv_cache;
+
+ public: // Register cache management functions.
+
+ /** @brief Flushes the entire register cache. */
+ static void flushAll() { cv_cache.flush(); }
+
+ private: // Register cache management functions.
+
+ /** @return True if an entry for this register exist in this cache. */
+ bool queryCache() const
+ {
+ return cv_cache.query( getAccessorChip(), this );
+ }
+
+ /** @return A reference to this register's BitString in cache. */
+ BitString & accessCache() const
+ {
+ return cv_cache.access( getAccessorChip(), this );
+ }
};
} // end namespace libhei
diff --git a/src/register/prdfRegisterCache.C b/src/register/prdfRegisterCache.C
deleted file mode 100644
index f73b4cd..0000000
--- a/src/register/prdfRegisterCache.C
+++ /dev/null
@@ -1,126 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2017 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-#include <hei_includes.hpp>
-
-#include <prdfRegisterCache.H>
-
-namespace libhei
-{
-
-//------------------------------------------------------------------------------
-
-RegDataCache & RegDataCache::getCachedRegisters()
-{
- return PRDF_GET_SINGLETON( ReadCache );
-}
-
-//------------------------------------------------------------------------------
-
-RegDataCache::~RegDataCache()
-{
- flush();
-}
-
-//------------------------------------------------------------------------------
-
-BitString & RegDataCache::read( ExtensibleChip * i_chip,
- const Register * i_reg )
-{
- ScomRegisterAccess l_scomAccessKey ( *i_reg, i_chip );
- BitString * l_pBitString = queryCache( l_scomAccessKey );
-
- if ( nullptr == l_pBitString )
- {
- // Creating new entry
- l_pBitString = new BitStringBuffer( i_reg->GetBitLength() );
- // Adding register in the cache
- iv_cachedRead[l_scomAccessKey] = l_pBitString;
- }
-
- return *l_pBitString;
-}
-
-//------------------------------------------------------------------------------
-
-void RegDataCache::flush()
-{
- for ( CacheDump::iterator it = iv_cachedRead.begin();
- it != iv_cachedRead.end(); it++ )
- {
- // Freeing up the bit string memory reserved on heap
- delete it->second;
- }
-
- // Deleting all the entry from the cache
- iv_cachedRead.clear();
-}
-
-//------------------------------------------------------------------------------
-
-void RegDataCache::flush( ExtensibleChip* i_pChip,
- const Register * i_pRegister )
-{
- ScomRegisterAccess l_scomAccessKey ( *i_pRegister,i_pChip );
- // Find the entries associated with the given target in the map
- CacheDump::iterator it = iv_cachedRead.find( l_scomAccessKey );
-
- // If entry exists delete the entry for given scom address
- if ( it !=iv_cachedRead.end() )
- {
- delete it->second;
- iv_cachedRead.erase( it );
- }
-}
-
-//------------------------------------------------------------------------------
-
-BitString * RegDataCache::queryCache(
- ExtensibleChip* i_pChip,
- const Register * i_pRegister )const
-{
- ScomRegisterAccess l_scomAccessKey ( *i_pRegister,i_pChip );
- return queryCache( l_scomAccessKey );
-}
-
-//------------------------------------------------------------------------------
-
-BitString * RegDataCache::queryCache(
- const ScomRegisterAccess & i_scomAccessKey ) const
-{
- BitString * l_pBitString = nullptr;
- CacheDump::const_iterator itDump = iv_cachedRead.find( i_scomAccessKey );
- if( iv_cachedRead.end() != itDump )
- {
- l_pBitString = itDump->second ;
- }
-
- return l_pBitString;
-}
-
-//------------------------------------------------------------------------------
-
-} // end namespace libhei
-
diff --git a/src/register/prdfRegisterCache.H b/src/register/prdfRegisterCache.H
deleted file mode 100644
index 9176b0e..0000000
--- a/src/register/prdfRegisterCache.H
+++ /dev/null
@@ -1,123 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2017 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-#ifndef REG_CACHE_H
-#define REG_CACHE_H
-
-/** @file prdfRegisterCache.H */
-
-#include <map>
-
-#include <util/hei_bit_string.hpp>
-
-#include <prdfGlobal.H>
-#include <prdfScanFacility.H>
-#include <prdfTargetFwdRef.H>
-
-namespace libhei
-{
-/**
- * @brief Caches the contents of registers used during analysis.
- *
- * It maintains the latest content of a register in a map. If contents of the
- * register remain unchanged, register read returns contents stored in
- * cache rather than reading from hardware. Hence it brings efficiency in read.
- * Whenever write to actual hardware takes place, it is expected that once write
- * to hardware succeeds, the user of cache shall call flush. It drops the
- * particular register from map. As a result, when read takes place from same
- * register next time, read from cache fails and actual access to hardware
- * takes place.
- */
-class RegDataCache
-{
- public:
-
- /**
- * @brief Constructor
- */
- RegDataCache()
- { }
-
- /**
- * @brief Destructor
- */
- ~RegDataCache();
-
- /**
- * @brief Returns reference to singleton instance of the RegDataCache.
- * @return The singleton reference.
- */
- static RegDataCache & getCachedRegisters();
-
- /**
- * @brief Returns the data buffer for the given target and address.
- * @param i_chip The target associated with the register.
- * @param i_reg Pointer to register to be read.
- * @return A reference to the data buffer associated with the register.
- */
- BitString & read( ExtensibleChip * i_chip,
- const Register * i_reg );
-
- /**
- * @brief Flushes entire contents from cache.
- */
- void flush();
-
- /**
- * @brief Removes a single entry from the cache.
- * @param i_pChip The rulechip associated with the register.
- * @param i_pRegister points to the register to be flushed from cache.
- */
- void flush( ExtensibleChip* i_pChip,
- const Register * i_pRegister );
- /**
- * @brief Queries if a specific entry exist in cache.
- * @param i_pChip The rulechip associated with the register.
- * @param i_pRegister base part of register entry to be queried in cache.
- * @return pointer to cache entry associated with a given register
- */
- BitString * queryCache( ExtensibleChip* i_pChip,
- const Register * i_pRegister )const;
- /**
- * @brief Queries if a specific entry exist in cache.
- * @param i_scomAccessKey Reference to register to be queried.
- * @return pointer to cache entry associated with a given register
- */
-
- BitString * queryCache(
- const ScomRegisterAccess & i_scomAccessKey )const;
- private: // data
-
- typedef std::map<ScomRegisterAccess, BitString *> CacheDump;
- CacheDump iv_cachedRead;
-
-};
-
-PRDF_DECLARE_SINGLETON(RegDataCache, ReadCache);
-
-} // end namespace libhei
-
-#endif // REG_CACHE_H
-