commit | dc47e0afbdf94a73b4e66ce590914bf6c3852aa7 | [log] [tgz] |
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author | Paul Greenwood <Paul.Greenwood@ibm.com> | Fri Nov 01 16:22:57 2019 -0500 |
committer | Zane Shelley <zshelle@us.ibm.com> | Wed Dec 11 22:08:37 2019 -0600 |
tree | f8ffebdff027bd2dbcb9f0fcbfa8190fe787e7e1 | |
parent | ec06f824163c4965f4ffcfd5f7169f69f657b7b3 [diff] |
Operator Registers; bitwise math operators A library of useful classes used to perform logical or bitwise math on or between other registers. The classes implemented here include NotRegister, LeftShiftRegister, RightShiftRegister, AndRegister, OrRegister, and ConstantRegister. Accompanied with other Register classes and the getBitString() function, it is possible to perform operations like: AndRegister reg{<register1>,<register2>}; result = reg.getBitString(<someChip>); This example will return a BitString containing the result of the bitwise AND operation applied to register1 and register2. Signed-off-by: Paul Greenwood <Paul.Greenwood@ibm.com> Change-Id: I660c540bde1c02520962524b9ffb5fa7faf1d86f
This library is a common, portable code base for isolating errors reported by hardware registers on POWER Systems chips.
The primary consumers (and requirements drivers) will be:
See the primary API definitions for details on how to use this library.
This library is intended to be integrated into containing user applications as a set of source files (either imported, or as a git subtree/submodule).
Details TBD.
__HEI_READ_ONLY
: When defined, it will ensure any hardware write support is disabled. Note that the Chip Data Files will contain rules for clearing and masking register bits. Both of which will require modifying hardware registers, which is not allowed by user applications like OpenBMC or FSP firmware.src/include/
in the POWER Systems Hostboot firmware.