Update P10 chip data XML
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ia864d6b7cb6bea6f245c0794687b0d32f2a3691c
diff --git a/xml/p10/node_eq_qme_fir.xml b/xml/p10/node_eq_qme_fir.xml
index aaaa854..0f0a3e1 100644
--- a/xml/p10/node_eq_qme_fir.xml
+++ b/xml/p10/node_eq_qme_fir.xml
@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
-<attn_node model_ec="P10_10" name="EQ_QME_FIR" reg_type="SCOM">
+<attn_node model_ec="P10_20" name="EQ_QME_FIR" reg_type="SCOM">
<register name="EQ_QME_FIR">
<instance addr="0x200E0000" reg_inst="0"/>
<instance addr="0x210E0000" reg_inst="1"/>
@@ -84,12 +84,12 @@
<bit pos="13">PGPE Heartbeat Lost indication from a hardware deadman timer controlled by QHB. Intended to be reported as an interrupt to QME via action 10.</bit>
<bit pos="14">Notification that BCE has not made forward progress in the time period corresponding to two scrub timer pulses (regardless of scrub enable). The BCE</bit>
<bit pos="15">Resclk TARGET_PSTATE Change Protocol Error. PGPE code bug.</bit>
- <bit pos="16">PCB Network or Endpoint Reset occurred when QME was not halted. This should never occur during runtime (for lab debug use only) and MAY result in loss</bit>
+ <bit pos="16">Unexpected PCB Network or Endpoint Reset occurred when QME was not halted, had an active request to the PCB Slave, or the QME saw a reset without a</bit>
<bit pos="17">Firmware cleared their Special Wakeup request in SPWU_{OTR|FSP|OCC|HYP}[ SPECIAL_WKUP_REQ] before the SPECIAL_WKUP_DONE was set.</bit>
<bit pos="18">Indicates a window condition occurred where one firmware component set a new special wakeup right after a different firmware component cleared the</bit>
<bit pos="19">Any of the Core External Interrupt wakeup sources (os, hyp, msgsnd, msgsndu) are present but disabled by the threads PECE (or UDEE) when it is in Stop</bit>
<bit pos="20">Any of the Core External Interrupts (os, hyp, msgsnd, msgsndu) are present but the chiplet is deconfigured (based on the partial good region enable</bit>
- <bit pos="21">Notification that RS4 engine has not made forward progress in the time period corresponding to two watchdog timer pulses (regardless of PPE watchdog</bit>
+ <bit pos="21">Reserved</bit>
<bit pos="22">Data hang was detected in the powerbus logic, caused by a powerbus read command waiting for data that is lost.</bit>
<bit pos="23">The PPE tried to write a protected address as defined by the SWPR[n] register</bit>
<bit pos="24">DTC Sequencer read a UE from SRAM, causing it to abort its current sequence and disable itself in QMCR.</bit>
@@ -102,6 +102,6 @@
<bit pos="31">Set based on the OR of three ERR[LOCAL_ACCESS_*_ERR] bits.</bit>
<bit pos="32">CE detected on a read to the SSA located in the QME powerbus routing logic.</bit>
<bit pos="33">UE detected on a read to the SSA located in the QME powerbus routing logic.</bit>
- <bit pos="34">Implemented but not used. Input tied to 0.</bit>
+ <bit pos="34">A parity error was detected in one of the CCFG latches present in the Resonant Clock stepper logic in the QME.</bit>
<bit pos="35">Implemented but not used. Input tied to 0.</bit>
</attn_node>