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Zane Shelleyb406de42019-09-09 16:10:38 -05001/**
2 * @file hei_types.hpp
3 *
4 * This file contains simple types/enums used throughout all of the isolator
5 * code.
6 */
7
8#pragma once
9
10#include <stdint.h>
11
12namespace libhei
13{
14
15/**
Zane Shelley0d4f5622019-10-14 13:02:30 -050016 * A value representing the type of chip that is being accessed. A unique value
17 * will exist for each Chip Data File. During isolation, the user application
18 * will pass these values to the isolator along with pointers to the user
19 * application's chip objects. This tells the isolator which Chip Data File to
20 * reference for each chip.
21 *
22 * Values:
23 * The values are determined by the chip manufacturer. The isolator does not
24 * need to know the possible values because the user application controls
25 * both the Chip Data Files and the input into the isolation function.
26 * Therefore, no values will be listed in this enum except for the default
27 * invalid type.
28 *
29 * Range:
30 * A 4-byte field should be sufficient.
Zane Shelleyb406de42019-09-09 16:10:38 -050031 */
Zane Shelley0d4f5622019-10-14 13:02:30 -050032enum ChipType_t : uint32_t
33{
34 CHIP_TYPE_INVALID = 0, ///< invalid/unsupported type
35};
Zane Shelleyb406de42019-09-09 16:10:38 -050036
37/**
Zane Shelley0d4f5622019-10-14 13:02:30 -050038 * Different chips will contain different types of registers. Also, a single
39 * chip may also support multiple types of registers. These enum values are
40 * used to communicate to the user application which type of register access is
41 * needed.
42 *
43 * Values:
44 * The supported register types are listed in this enum.
45 *
46 * Range:
47 * Power Systems only have a couple different types that would be accessed by
48 * the isolator. The minimum 1-byte field should be sufficient.
Zane Shelleyb406de42019-09-09 16:10:38 -050049 */
Zane Shelley0d4f5622019-10-14 13:02:30 -050050enum RegisterType_t : uint8_t
51{
52 REG_TYPE_INVALID = 0, ///< invalid/unsupported type
53 REG_TYPE_SCOM = 1, ///< Power Systems SCOM register.
54 REG_TYPE_ID_SCOM = 2, ///< Power Systems Indirect SCOM register.
55};
56
57/**
58 * Each register within a chip must have a unique ID. These IDs (combined with
59 * other information) will be passed back to the user application to identify
60 * all of the active errors reported by this chip. Note that some registers will
61 * have multiple instances within a chip. An ID will be used for all instances
62 * of a register. See enum RegisterInstance_t for details on the register
63 * instance value.
64 *
65 * Values:
66 * The isolator does not need to know the possible values because the values
67 * are passed from the Chip Data Files to the user application. Therefore, no
68 * values will be listed in this enum except for the default invalid type.
69 *
70 * Range:
71 * A 2-byte field should be sufficient to support up to 65535 registers on a
72 * chip.
73 */
74enum RegisterId_t : uint16_t
75{
76 REG_ID_INVALID = 0, ///< invalid/unsupported type
77};
78
79/**
80 * A chip could contain more than one instance of a register. For example, a
81 * register could exist for each instance of a core on a processor chip.
82 * This field will be used to differeniate multiple instances of a register in
83 * order to avoid repeating common information for every instance.
84 *
85 * Values:
86 * Not all registers will have multiple instances. So the default instance
87 * value is 0, which always indicates the first (or only) logical instance.
88 * Then a value of 1-255 can be used for each subsequent instance.
89 *
90 * Range:
91 * The 1-byte field should be sufficient.
92 */
93enum RegisterInstance_t : uint8_t
94{
95 REG_INST_DEFAULT = 0, ///< indicates the first (or only) logical instance
96};
97
98/**
99 * The hardware address of a register (right justified).
100 *
101 * Values:
102 * Currently only supporting 1, 2, 4, or 8 byte addresses.
103 *
104 * Range:
105 * The maximum supported address requires an 8-byte field.
106 */
107enum RegisterAddress_t : uint64_t
108{
109 REG_ADDR_INVALID = 0, ///< invalid/unsupported address
110};
111
112/**
113 * The hardware access level of a register.
114 *
115 * Values:
116 * The supported access levels are listed in this enum.
117 *
118 * Range:
119 * Only the minimum 1-byte field is necessary.
120 */
121enum RegisterAccessLevel_t : uint8_t
122{
123 REG_ACCESS_NONE = 0x0, ///< No access
124 REG_ACCESS_RO = 0x1, ///< Read-only access
125 REG_ACCESS_WO = 0x2, ///< Write-only access
126 REG_ACCESS_RW = 0x3, ///< Read/Write access
127};
Zane Shelleyb406de42019-09-09 16:10:38 -0500128
129} // end namespace libhei
Zane Shelley0d4f5622019-10-14 13:02:30 -0500130