Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 1 | #pragma once |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 2 | |
Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame] | 3 | #include <register/hei_register.hpp> |
| 4 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 5 | namespace libhei |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 6 | { |
| 7 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 8 | /** |
| 9 | * @brief An abstract class for all operator registers. |
| 10 | * |
| 11 | * Contains member functions and variables that are required for all child |
| 12 | * classes. |
| 13 | */ |
| 14 | class OperatorRegister : public Register |
| 15 | { |
| 16 | public: |
| 17 | /** @brief Pure virtual destructor. */ |
| 18 | virtual ~OperatorRegister() = 0; |
| 19 | |
| 20 | protected: |
| 21 | /** |
| 22 | * @brief Constructor from components. |
| 23 | * @param i_size Size (in bytes) of this register. |
| 24 | */ |
| 25 | explicit OperatorRegister(size_t i_size) : Register(), iv_result(i_size * 8) |
| 26 | {} |
| 27 | |
| 28 | protected: // Instance variables |
| 29 | /** When getBitString() is called on an operator, the resulting value of the |
| 30 | * operation will be stored in this instance variable. */ |
| 31 | BitStringBuffer iv_result; |
| 32 | |
| 33 | public: |
| 34 | /** @brief Overloaded from parent class. */ |
| 35 | virtual const BitString* getBitString(const Chip& i_chip) const = 0; |
| 36 | |
| 37 | /** @brief Overloaded from parent class. */ |
| 38 | size_t getSize() const |
| 39 | { |
| 40 | return (BitString::getMinBytes(iv_result.getBitLen())); |
| 41 | } |
| 42 | }; |
| 43 | |
| 44 | // Pure virtual destructor must be defined. |
| 45 | inline OperatorRegister::~OperatorRegister() {} |
| 46 | |
| 47 | class NotRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 48 | { |
| 49 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 50 | /** |
| 51 | * @brief Constructor from components. |
| 52 | * @param i_arg Target register for operation. |
| 53 | */ |
| 54 | explicit NotRegister(Register& i_arg) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 55 | OperatorRegister(i_arg.getSize()), iv_child(&i_arg) |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 56 | {} |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 57 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 58 | /** @brief Default destructor. */ |
| 59 | ~NotRegister() = default; |
| 60 | |
| 61 | /** @brief Default copy constructor. */ |
| 62 | NotRegister(const NotRegister&) = default; |
| 63 | |
| 64 | /** @brief Default assignment operator. */ |
| 65 | NotRegister& operator=(const NotRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 66 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 67 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 68 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 69 | { |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 70 | const auto* bs = iv_child->getBitString(i_chip); |
| 71 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 72 | (const_cast<NotRegister*>(this))->iv_result = ~(*bs); |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 73 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 74 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 75 | } |
| 76 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 77 | bool operator==(const NotRegister& r) const |
| 78 | { |
| 79 | return r.iv_child == iv_child; |
| 80 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 81 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 82 | bool operator<(const NotRegister& r) const |
| 83 | { |
| 84 | return iv_child < r.iv_child; |
| 85 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 86 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 87 | private: |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 88 | Register* iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 89 | }; |
| 90 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 91 | class LeftShiftRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 92 | { |
| 93 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 94 | /** |
| 95 | * @brief Constructor from components. |
| 96 | * @param i_arg Target register for operation. |
| 97 | * @param i_amount The shift value. |
| 98 | */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 99 | LeftShiftRegister(Register& i_arg, uint16_t i_amount) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 100 | OperatorRegister(i_arg.getSize()), iv_child(&i_arg), iv_amount(i_amount) |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 101 | {} |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 102 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 103 | /** @brief Default destructor. */ |
| 104 | ~LeftShiftRegister() = default; |
| 105 | |
| 106 | /** @brief Default copy constructor. */ |
| 107 | LeftShiftRegister(const LeftShiftRegister&) = default; |
| 108 | |
| 109 | /** @brief Default assignment operator. */ |
| 110 | LeftShiftRegister& operator=(const LeftShiftRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 111 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 112 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 113 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 114 | { |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 115 | const auto* bs = iv_child->getBitString(i_chip); |
| 116 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 117 | (const_cast<LeftShiftRegister*>(this))->iv_result = (*bs) << iv_amount; |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 118 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 119 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 120 | } |
| 121 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 122 | bool operator==(const LeftShiftRegister& r) const |
| 123 | { |
| 124 | return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); |
| 125 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 126 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 127 | bool operator<(const LeftShiftRegister& r) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 128 | { |
| 129 | if (iv_child == r.iv_child) |
| 130 | return iv_amount < r.iv_amount; |
| 131 | return iv_child < r.iv_child; |
| 132 | } |
| 133 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 134 | private: |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 135 | Register* iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 136 | uint16_t iv_amount; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 137 | }; |
| 138 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 139 | class RightShiftRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 140 | { |
| 141 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 142 | /** |
| 143 | * @brief Constructor from components. |
| 144 | * @param i_arg Target register for operation. |
| 145 | * @param i_amount The shift value. |
| 146 | */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 147 | RightShiftRegister(Register& i_arg, uint16_t i_amount) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 148 | OperatorRegister(i_arg.getSize()), iv_child(&i_arg), iv_amount(i_amount) |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 149 | {} |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 150 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 151 | /** @brief Default destructor. */ |
| 152 | ~RightShiftRegister() = default; |
| 153 | |
| 154 | /** @brief Default copy constructor. */ |
| 155 | RightShiftRegister(const RightShiftRegister&) = default; |
| 156 | |
| 157 | /** @brief Default assignment operator. */ |
| 158 | RightShiftRegister& operator=(const RightShiftRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 159 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 160 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 161 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 162 | { |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 163 | const auto* bs = iv_child->getBitString(i_chip); |
| 164 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 165 | (const_cast<RightShiftRegister*>(this))->iv_result = (*bs) >> iv_amount; |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 166 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 167 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 168 | } |
| 169 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 170 | bool operator==(const RightShiftRegister& r) const |
| 171 | { |
| 172 | return (r.iv_child == iv_child) && (r.iv_amount == iv_amount); |
| 173 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 174 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 175 | bool operator<(const RightShiftRegister& r) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 176 | { |
| 177 | if (iv_child == r.iv_child) |
| 178 | return iv_amount < r.iv_amount; |
| 179 | return iv_child < r.iv_child; |
| 180 | } |
| 181 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 182 | private: |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 183 | Register* iv_child; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 184 | uint16_t iv_amount; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 185 | }; |
| 186 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 187 | class AndRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 188 | { |
| 189 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 190 | /** |
| 191 | * @brief Constructor from components. |
| 192 | * @param i_left Target register for operation. |
| 193 | * @param i_right Target register for operation. |
| 194 | */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 195 | AndRegister(Register& i_left, Register& i_right) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 196 | OperatorRegister(std::min(i_left.getSize(), i_right.getSize())), |
| 197 | iv_left(&i_left), iv_right(&i_right) |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 198 | {} |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 199 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 200 | /** @brief Default destructor. */ |
| 201 | ~AndRegister() = default; |
| 202 | |
| 203 | /** @brief Default copy constructor. */ |
| 204 | AndRegister(const AndRegister&) = default; |
| 205 | |
| 206 | /** @brief Default assignment operator. */ |
| 207 | AndRegister& operator=(const AndRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 208 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 209 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 210 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 211 | { |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 212 | const auto* l_bs = iv_left->getBitString(i_chip); |
| 213 | const auto* r_bs = iv_right->getBitString(i_chip); |
| 214 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 215 | (const_cast<AndRegister*>(this))->iv_result = (*l_bs) & (*r_bs); |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 216 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 217 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 218 | } |
| 219 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 220 | bool operator==(const AndRegister& r) const |
| 221 | { |
| 222 | return (r.iv_left == iv_left) && (r.iv_right == iv_right); |
| 223 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 224 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 225 | bool operator<(const AndRegister& r) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 226 | { |
| 227 | if (iv_left == r.iv_left) |
| 228 | return iv_right < r.iv_right; |
| 229 | return iv_left < r.iv_left; |
| 230 | } |
| 231 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 232 | private: |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 233 | Register* iv_left; |
| 234 | Register* iv_right; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 235 | }; |
| 236 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 237 | class OrRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 238 | { |
| 239 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 240 | /** |
| 241 | * @brief Constructor from components. |
| 242 | * @param i_left Target register for operation. |
| 243 | * @param i_right Target register for operation. |
| 244 | */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 245 | OrRegister(Register& i_left, Register& i_right) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 246 | OperatorRegister(std::min(i_left.getSize(), i_right.getSize())), |
| 247 | iv_left(&i_left), iv_right(&i_right) |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 248 | {} |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 249 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 250 | /** @brief Default destructor. */ |
| 251 | ~OrRegister() = default; |
| 252 | |
| 253 | /** @brief Default copy constructor. */ |
| 254 | OrRegister(const OrRegister&) = default; |
| 255 | |
| 256 | /** @brief Default assignment operator. */ |
| 257 | OrRegister& operator=(const OrRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 258 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 259 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 260 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 261 | { |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 262 | const auto* l_bs = iv_left->getBitString(i_chip); |
| 263 | const auto* r_bs = iv_right->getBitString(i_chip); |
| 264 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 265 | (const_cast<OrRegister*>(this))->iv_result = (*l_bs) | (*r_bs); |
Zane Shelley | d4c0e98 | 2019-12-05 21:27:41 -0600 | [diff] [blame] | 266 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 267 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 268 | } |
| 269 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 270 | bool operator==(const OrRegister& r) const |
| 271 | { |
| 272 | return (r.iv_left == iv_left) && (r.iv_right == iv_right); |
| 273 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 274 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 275 | bool operator<(const OrRegister& r) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 276 | { |
| 277 | if (iv_left == r.iv_left) |
| 278 | return iv_right < r.iv_right; |
| 279 | return iv_left < r.iv_left; |
| 280 | } |
| 281 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 282 | private: |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 283 | Register* iv_left; |
| 284 | Register* iv_right; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 285 | }; |
| 286 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 287 | class ConstantRegister : public OperatorRegister |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 288 | { |
| 289 | public: |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 290 | /** |
| 291 | * @brief Constructor from components. |
| 292 | * @param i_arg A BitStringBuffer containing the constant value. |
| 293 | */ |
| 294 | explicit ConstantRegister(const BitStringBuffer& i_arg) : |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 295 | OperatorRegister(BitString::getMinBytes(i_arg.getBitLen())) |
| 296 | { |
| 297 | iv_result = i_arg; |
| 298 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 299 | |
Zane Shelley | 48aa860 | 2019-12-05 21:41:21 -0600 | [diff] [blame] | 300 | /** @brief Default destructor. */ |
| 301 | ~ConstantRegister() = default; |
| 302 | |
| 303 | /** @brief Default copy constructor. */ |
| 304 | ConstantRegister(const ConstantRegister&) = default; |
| 305 | |
| 306 | /** @brief Default assignment operator. */ |
| 307 | ConstantRegister& operator=(const ConstantRegister& r) = default; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 308 | |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 309 | /** @brief Overloaded from parent class. */ |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 310 | const BitString* getBitString(const Chip& i_chip) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 311 | { |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 312 | return &iv_result; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 313 | } |
| 314 | |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 315 | bool operator==(const ConstantRegister& r) const |
| 316 | { |
Zane Shelley | b0559b9 | 2019-12-05 22:18:20 -0600 | [diff] [blame^] | 317 | return r.iv_result == iv_result; |
Zane Shelley | caee69f | 2019-12-05 13:42:58 -0600 | [diff] [blame] | 318 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 319 | }; |
| 320 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 321 | } // end namespace libhei |