Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 1 | #include <chip_data/hei_chip_data.hpp> |
| 2 | #include <chip_data/hei_chip_data_stream.hpp> |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 3 | #include <register/hei_operator_register.hpp> |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 4 | #include <register/hei_scom_register.hpp> |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 5 | |
| 6 | namespace libhei |
| 7 | { |
| 8 | |
| 9 | //------------------------------------------------------------------------------ |
| 10 | |
| 11 | using FileKeyword_t = uint64_t; |
| 12 | |
| 13 | constexpr FileKeyword_t KW_CHIPDATA = 0x4348495044415441; // "CHIPDATA" ASCII |
| 14 | |
| 15 | using SectionKeyword_t = uint32_t; |
| 16 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 17 | constexpr SectionKeyword_t KW_REGS = 0x52454753; // "REGS" ASCII |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 18 | constexpr SectionKeyword_t KW_NODE = 0x4e4f4445; // "NODE" ASCII |
| 19 | constexpr SectionKeyword_t KW_ROOT = 0x524f4f54; // "ROOT" ASCII |
| 20 | |
| 21 | using Version_t = uint8_t; |
| 22 | |
| 23 | constexpr Version_t VERSION_1 = 0x01; |
| 24 | |
| 25 | //------------------------------------------------------------------------------ |
| 26 | |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 27 | void __readRegister(ChipDataStream& io_stream, IsolationChip::Ptr& io_isoChip) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 28 | { |
| 29 | // Read the register metadata. |
| 30 | RegisterId_t id; |
| 31 | RegisterType_t type; |
| 32 | RegisterAttributeFlags_t attr; |
| 33 | Instance_t numInsts; |
| 34 | io_stream >> id >> type >> attr >> numInsts; |
| 35 | |
| 36 | // Must have at least one instance. |
| 37 | HEI_ASSERT(0 != numInsts); |
| 38 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 39 | for (unsigned int i = 0; i < numInsts; i++) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 40 | { |
| 41 | // Read the register instance metadata. |
| 42 | Instance_t inst; |
| 43 | io_stream >> inst; |
| 44 | |
| 45 | // The address size is dependent on the register type. |
| 46 | if (REG_TYPE_SCOM == type) |
| 47 | { |
| 48 | uint32_t addr; // 4-byte address. |
| 49 | io_stream >> addr; |
| 50 | |
| 51 | // Get this register from the flyweight factory. |
| 52 | auto& factory = Flyweight<const ScomRegister>::getSingleton(); |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 53 | auto hwReg = factory.get(id, inst, attr, addr); |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 54 | |
| 55 | // Add this register to the isolation chip. |
| 56 | io_isoChip->addHardwareRegister(hwReg); |
| 57 | } |
| 58 | else if (REG_TYPE_ID_SCOM == type) |
| 59 | { |
| 60 | uint64_t addr; // 8-byte address. |
| 61 | io_stream >> addr; |
| 62 | |
| 63 | // Get this register from the flyweight factory. |
| 64 | auto& factory = Flyweight<const IdScomRegister>::getSingleton(); |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 65 | auto hwReg = factory.get(id, inst, attr, addr); |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 66 | |
| 67 | // Add this register to the isolation chip. |
| 68 | io_isoChip->addHardwareRegister(hwReg); |
| 69 | } |
| 70 | else |
| 71 | { |
| 72 | HEI_ASSERT(false); // Register type unsupported. |
| 73 | } |
| 74 | } |
| 75 | } |
| 76 | |
| 77 | //------------------------------------------------------------------------------ |
| 78 | |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 79 | Register::ConstPtr __readExpr(ChipDataStream& io_stream, |
| 80 | const IsolationChip::Ptr& i_isoChip, |
| 81 | IsolationNode::Ptr& io_isoNode) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 82 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 83 | Register::ConstPtr expr{}; |
| 84 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 85 | uint8_t exprType; |
| 86 | io_stream >> exprType; |
| 87 | switch (exprType) |
| 88 | { |
| 89 | case 0x01: // register reference |
| 90 | { |
| 91 | RegisterId_t regId; |
| 92 | Instance_t regInst; |
| 93 | io_stream >> regId >> regInst; |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 94 | |
| 95 | // Find the hardware register that is stored in this isolation chip |
| 96 | // and add it to the list of capture registers. This ensures all |
| 97 | // registers referenced in the rules are are captured by default. |
| 98 | // Note that this will assert that the target register must exist in |
| 99 | // the isolation chip. |
| 100 | auto hwReg = i_isoChip->getHardwareRegister({regId, regInst}); |
| 101 | |
| 102 | // Add the register to the isolation node. |
| 103 | io_isoNode->addCaptureRegister(hwReg); |
| 104 | |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 105 | // Simply return this register. |
| 106 | expr = hwReg; |
| 107 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 108 | break; |
| 109 | } |
| 110 | case 0x02: // integer constant |
| 111 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 112 | auto& factory = Flyweight<const ConstantRegister>::getSingleton(); |
| 113 | |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 114 | if (REG_TYPE_SCOM == io_isoNode->getRegisterType() || |
| 115 | REG_TYPE_ID_SCOM == io_isoNode->getRegisterType()) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 116 | { |
| 117 | uint64_t constant; // 8-byte value |
| 118 | io_stream >> constant; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 119 | |
| 120 | // Create the constant register and put it in the flyweights. |
| 121 | expr = factory.get(constant); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 122 | } |
| 123 | else |
| 124 | { |
| 125 | HEI_ASSERT(false); // register type unsupported |
| 126 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 127 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 128 | break; |
| 129 | } |
| 130 | case 0x10: // AND operation |
| 131 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 132 | auto& factory = Flyweight<const AndRegister>::getSingleton(); |
| 133 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 134 | uint8_t numSubExpr; |
| 135 | io_stream >> numSubExpr; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 136 | |
| 137 | HEI_ASSERT(2 <= numSubExpr); // must be at least two |
| 138 | |
| 139 | // Read the first two sub-expressions. |
| 140 | auto e1 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 141 | auto e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 142 | HEI_ASSERT(e1 && e2); // Cannot be null |
| 143 | |
| 144 | // Create the AND register and put it in the flyweights. |
| 145 | expr = factory.get(e1, e2); |
| 146 | |
| 147 | // Iterate any remaining expressions. |
| 148 | for (uint8_t i = 2; i < numSubExpr; i++) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 149 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 150 | // Read the next sub-expressions. |
| 151 | e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 152 | HEI_ASSERT(e2); // Cannot be null |
| 153 | |
| 154 | // Create the AND register and put it in the flyweights. |
| 155 | expr = factory.get(expr, e2); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 156 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 157 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 158 | break; |
| 159 | } |
| 160 | case 0x11: // OR operation |
| 161 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 162 | auto& factory = Flyweight<const OrRegister>::getSingleton(); |
| 163 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 164 | uint8_t numSubExpr; |
| 165 | io_stream >> numSubExpr; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 166 | |
| 167 | HEI_ASSERT(2 <= numSubExpr); // must be at least two |
| 168 | |
| 169 | // Read the first two sub-expressions. |
| 170 | auto e1 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 171 | auto e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 172 | HEI_ASSERT(e1 && e2); // Cannot be null |
| 173 | |
| 174 | // Create the OR register and put it in the flyweights. |
| 175 | expr = factory.get(e1, e2); |
| 176 | |
| 177 | // Iterate any remaining expressions. |
| 178 | for (uint8_t i = 2; i < numSubExpr; i++) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 179 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 180 | // Read the next sub-expressions. |
| 181 | e2 = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 182 | HEI_ASSERT(e2); // Cannot be null |
| 183 | |
| 184 | // Create the OR register and put it in the flyweights. |
| 185 | expr = factory.get(expr, e2); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 186 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 187 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 188 | break; |
| 189 | } |
| 190 | case 0x12: // NOT operation |
| 191 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 192 | auto& factory = Flyweight<const NotRegister>::getSingleton(); |
| 193 | |
| 194 | // Read the sub-expression |
| 195 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 196 | HEI_ASSERT(e); // Cannot be null |
| 197 | |
| 198 | // Create the NOT register and put it in the flyweights. |
| 199 | expr = factory.get(e); |
| 200 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 201 | break; |
| 202 | } |
| 203 | case 0x13: // left shift operation |
| 204 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 205 | auto& factory = Flyweight<const LeftShiftRegister>::getSingleton(); |
| 206 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 207 | uint8_t shiftValue; |
| 208 | io_stream >> shiftValue; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 209 | |
| 210 | // Read the sub-expression |
| 211 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 212 | HEI_ASSERT(e); // Cannot be null |
| 213 | |
| 214 | // Create the left shift register and put it in the flyweights. |
| 215 | expr = factory.get(e, shiftValue); |
| 216 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 217 | break; |
| 218 | } |
| 219 | case 0x14: // right shift operation |
| 220 | { |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 221 | auto& factory = Flyweight<const RightShiftRegister>::getSingleton(); |
| 222 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 223 | uint8_t shiftValue; |
| 224 | io_stream >> shiftValue; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 225 | |
| 226 | // Read the sub-expression |
| 227 | auto e = __readExpr(io_stream, i_isoChip, io_isoNode); |
| 228 | HEI_ASSERT(e); // Cannot be null |
| 229 | |
| 230 | // Create the right shift register and put it in the flyweights. |
| 231 | expr = factory.get(e, shiftValue); |
| 232 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 233 | break; |
| 234 | } |
| 235 | default: |
| 236 | HEI_ASSERT(false); // unsupported expression type |
| 237 | } |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 238 | |
| 239 | return expr; |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | //------------------------------------------------------------------------------ |
| 243 | |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 244 | void __readNode(ChipDataStream& io_stream, IsolationChip::Ptr& io_isoChip) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 245 | { |
| 246 | // Read the node metadata. |
| 247 | NodeId_t nodeId; |
| 248 | RegisterType_t regType; |
| 249 | Instance_t numInsts; |
| 250 | io_stream >> nodeId >> regType >> numInsts; |
| 251 | |
| 252 | for (unsigned int i = 0; i < numInsts; i++) |
| 253 | { |
| 254 | // Read the node instance metadata. |
| 255 | Instance_t nodeInst; |
| 256 | uint8_t numCapRegs, numIsoRules, numChildNodes; |
| 257 | io_stream >> nodeInst >> numCapRegs >> numIsoRules >> numChildNodes; |
| 258 | |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 259 | // There must be at least one isolation rule defined. |
| 260 | HEI_ASSERT(0 != numIsoRules); |
| 261 | |
| 262 | // Allocate memory for this isolation node. |
| 263 | auto isoNode = |
| 264 | std::make_shared<IsolationNode>(nodeId, nodeInst, regType); |
| 265 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 266 | // Add capture registers. |
| 267 | for (unsigned int j = 0; j < numCapRegs; j++) |
| 268 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 269 | // Read the capture register metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 270 | RegisterId_t regId; |
| 271 | Instance_t regInst; |
| 272 | io_stream >> regId >> regInst; |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 273 | |
| 274 | // Find the hardware register that is stored in this isolation chip |
| 275 | // and add it to the list of capture registers. Note that this will |
| 276 | // assert that the target register must exist in the isolation chip. |
| 277 | auto hwReg = io_isoChip->getHardwareRegister({regId, regInst}); |
| 278 | |
| 279 | // Add the register to the isolation node. |
| 280 | isoNode->addCaptureRegister(hwReg); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 281 | } |
| 282 | |
| 283 | // Add isolation rules. |
| 284 | for (unsigned int j = 0; j < numIsoRules; j++) |
| 285 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 286 | // Read the rule metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 287 | AttentionType_t attnType; |
| 288 | io_stream >> attnType; |
Zane Shelley | f8c92f9 | 2020-05-16 10:17:16 -0500 | [diff] [blame^] | 289 | |
| 290 | // Read out the rule for this attention type. |
| 291 | auto rule = __readExpr(io_stream, io_isoChip, isoNode); |
| 292 | HEI_ASSERT(rule); // Cannot be null |
| 293 | |
| 294 | // Add the rule to the isolation node. |
| 295 | isoNode->addRule(attnType, rule); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | // Add child nodes. |
| 299 | for (unsigned int j = 0; j < numChildNodes; j++) |
| 300 | { |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 301 | // Read the child node metadata. |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 302 | BitPosition_t bit; |
Zane Shelley | d065924 | 2020-05-15 23:02:29 -0500 | [diff] [blame] | 303 | NodeId_t childId; |
| 304 | Instance_t childInst; |
| 305 | io_stream >> bit >> childId >> childInst; |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 306 | } |
Zane Shelley | 6eb6190 | 2020-05-15 22:25:58 -0500 | [diff] [blame] | 307 | |
| 308 | // Add this node to the isolation chip. |
| 309 | io_isoChip->addIsolationNode(isoNode); |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 310 | } |
| 311 | } |
| 312 | |
| 313 | //------------------------------------------------------------------------------ |
| 314 | |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 315 | void __readRoot(ChipDataStream& io_stream, IsolationChip::Ptr& io_isoChip) |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 316 | { |
| 317 | AttentionType_t attnType; |
| 318 | NodeId_t id; |
| 319 | Instance_t inst; |
| 320 | io_stream >> attnType >> id >> inst; |
| 321 | } |
| 322 | |
| 323 | //------------------------------------------------------------------------------ |
| 324 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 325 | void parseChipDataFile(void* i_buffer, size_t i_bufferSize, |
Zane Shelley | 4de8ff8 | 2020-05-14 15:39:01 -0500 | [diff] [blame] | 326 | IsolationChip::Map& io_isoChips) |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 327 | { |
| 328 | ChipDataStream stream{i_buffer, i_bufferSize}; |
| 329 | |
| 330 | // Read the file metadata. |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 331 | FileKeyword_t fileKeyword; |
| 332 | ChipType_t chipType; |
| 333 | Version_t version; |
| 334 | stream >> fileKeyword >> chipType >> version; |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 335 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 336 | // Check the file keyword. |
| 337 | HEI_ASSERT(KW_CHIPDATA == fileKeyword); |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 338 | |
| 339 | // This chip type should not already exist. |
| 340 | HEI_ASSERT(io_isoChips.end() == io_isoChips.find(chipType)); |
| 341 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 342 | // So far there is only one supported version type so check it here. |
| 343 | HEI_ASSERT(VERSION_1 == version); |
| 344 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 345 | // Allocate memory for the new isolation chip. |
| 346 | auto isoChip = std::make_unique<IsolationChip>(chipType); |
| 347 | |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 348 | // Read the register list metadata. |
| 349 | SectionKeyword_t regsKeyword; |
| 350 | RegisterId_t numRegs; |
| 351 | stream >> regsKeyword >> numRegs; |
| 352 | |
| 353 | // Check the register keyword. |
| 354 | HEI_ASSERT(KW_REGS == regsKeyword); |
| 355 | |
| 356 | // There must be at least one register defined. |
| 357 | HEI_ASSERT(0 != numRegs); |
| 358 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 359 | for (unsigned int i = 0; i < numRegs; i++) |
Zane Shelley | b9a8e76 | 2020-05-11 21:41:32 -0500 | [diff] [blame] | 360 | { |
| 361 | __readRegister(stream, isoChip); |
| 362 | } |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 363 | |
Zane Shelley | 0165edc | 2020-05-11 22:28:29 -0500 | [diff] [blame] | 364 | // Read the node list metadata. |
| 365 | SectionKeyword_t nodeKeyword; |
| 366 | NodeId_t numNodes; |
| 367 | stream >> nodeKeyword >> numNodes; |
| 368 | |
| 369 | // Check the node keyword. |
| 370 | HEI_ASSERT(KW_NODE == nodeKeyword); |
| 371 | |
| 372 | // There must be at least one node defined. |
| 373 | HEI_ASSERT(0 != numNodes); |
| 374 | |
| 375 | for (unsigned int i = 0; i < numNodes; i++) |
| 376 | { |
| 377 | __readNode(stream, isoChip); |
| 378 | } |
| 379 | |
| 380 | // Read the root node list metadata. |
| 381 | SectionKeyword_t rootKeyword; |
| 382 | AttentionType_t numRoots; |
| 383 | stream >> rootKeyword >> numRoots; |
| 384 | |
| 385 | // Check the root node keyword. |
| 386 | HEI_ASSERT(KW_ROOT == rootKeyword); |
| 387 | |
| 388 | // There must be at least one register defined. |
| 389 | HEI_ASSERT(0 != numRoots); |
| 390 | |
| 391 | for (unsigned int i = 0; i < numRoots; i++) |
| 392 | { |
| 393 | __readRoot(stream, isoChip); |
| 394 | } |
| 395 | |
| 396 | // At this point, the stream is done and it should be at the end of the |
| 397 | // file. |
| 398 | HEI_ASSERT(stream.eof()); |
| 399 | |
Zane Shelley | dd69c96 | 2020-05-05 22:19:11 -0500 | [diff] [blame] | 400 | // Add this isolation chip to the collective list of isolation chips. |
| 401 | auto ret = io_isoChips.emplace(chipType, std::move(isoChip)); |
| 402 | HEI_ASSERT(ret.second); // Just in case. |
| 403 | } |
| 404 | |
| 405 | //------------------------------------------------------------------------------ |
| 406 | |
| 407 | } // namespace libhei |