tree d02bdb500e930ca0e60a6f6e622ddc575eba115d
parent 3576d65ea65864afc78c3eb79f31f660f598e1c3
author Chris Cain <cjcain@us.ibm.com> 1655242083 -0500
committer Chris Cain <cjcain@us.ibm.com> 1655907118 -0500

Fix correlation between OCC StateSensorPDRs and procs

occ-control was not correlating the OCC Active sensors with the correct
processor. Code change will now use the Sensor ID to know which
OCC/proc is active. Hostboot will also be making a change to ensure that
the Sensor IDs are always numbered according to processor order (p0, p1,
etc)

Wait for PHYP to start before reading PLDM sensors:
occ-control caches the PLDM sensor IDs to limit the dbus queries.
The cache was supposed to be cleared when the OS was powered off, but
the existing code only cleared it when CurrentHostState was Off.
Got a defect where occ-control was using invalid/old sensor IDs when
getting notifications of OCC Active sensors. This causes the app to try
communicating with the wrong or invalid OCC.

Code change will clear the sensor cache anytime PHYP is not running, and
will populate the cache once PHYP is running.

Tested on hardware with various boot types and resets.

Change-Id: I4b32aa848768296065d6570466475f5b17771d2e
Signed-off-by: Chris Cain <cjcain@us.ibm.com>