tree e4e44b4b26c0bf3ca497de8f193ec63746a532ef
parent e22e8231c49d3a7fa4ea24d57e48be072e1d7e16
author Jayanth Othayoth <ojayanth@in.ibm.com> 1623850821 -0500
committer Jayanth Othayoth <ojayanth@in.ibm.com> 1623850821 -0500

Fix related P10 SPI mux settings

Existing code set all 32 bits to true for the CFAM 2818
register. Which is not correct because First 4 bits are
for the SPI mux related settings in cfam 2818 register.

Fixed with correct settings based register definition

Tested: Verified in hardware

Signed-off-by: Jayanth Othayoth <ojayanth@in.ibm.com>
Change-Id: I3b9281bee1980a355cc44238dccace2441d625b6