commit f78d90420967100233cc9c2a5e0834e9789e2637
author Patrick Venture <venture@google.com> Thu Nov 01 15:39:53 2018 -0700
committer Patrick Venture <venture@google.com> Fri Nov 02 07:44:49 2018 -0700
tree a2acee81dcaa830217753a84acf5af7c92a9c3f5
parent e84b4ddb671d97cb4725ee2de18979c69e42b971

add .clang-format

Add .clang-format for automatic style.

Change-Id: I6d240009370179b5b8f1f646b0476a059ec6aa85
Signed-off-by: Patrick Venture <venture@google.com>

procedures/p9/vcs_workaround.cpp

diff --git a/procedures/p9/vcs_workaround.cpp b/procedures/p9/vcs_workaround.cpp
index e418971..fe3da3c 100644
--- a/procedures/p9/vcs_workaround.cpp
+++ b/procedures/p9/vcs_workaround.cpp
@@ -13,12 +13,13 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#include <phosphor-logging/log.hpp>
 #include "cfam_access.hpp"
 #include "p9_cfam.hpp"
 #include "registration.hpp"
 #include "targeting.hpp"
 
+#include <phosphor-logging/log.hpp>
+
 namespace openpower
 {
 namespace p9
@@ -29,7 +30,6 @@
 using namespace openpower::cfam::p9;
 using namespace openpower::targeting;
 
-
 /**
  * @brief Performs the 'VCS Workaround' on all P9s in the system.
  * @return void
@@ -54,26 +54,23 @@
     log<level::INFO>("Running P9 procedure vcsWorkaround",
                      entry("NUM_PROCS=%d", targets.size()));
 
-    //Set asynchronous clock mode
+    // Set asynchronous clock mode
     writeReg(master, P9_LL_MODE_REG, 0x00000001);
 
     for (const auto& t : targets)
     {
-        //Unfence PLL controls
-        writeRegWithMask(t, P9_ROOT_CTRL0,
-                         0x00000000, 0x00010000);
+        // Unfence PLL controls
+        writeRegWithMask(t, P9_ROOT_CTRL0, 0x00000000, 0x00010000);
 
-        //Assert Perv chiplet endpoint reset
-        writeRegWithMask(t, P9_PERV_CTRL0,
-                         0x40000000, 0x40000000);
+        // Assert Perv chiplet endpoint reset
+        writeRegWithMask(t, P9_PERV_CTRL0, 0x40000000, 0x40000000);
 
-        //Enable Nest PLL
-        writeRegWithMask(t, P9_PERV_CTRL0,
-                         0x00000001, 0x00000001);
+        // Enable Nest PLL
+        writeRegWithMask(t, P9_PERV_CTRL0, 0x00000001, 0x00000001);
     }
 }
 
 REGISTER_PROCEDURE("vcsWorkaround", vcsWorkaround);
 
-}
-}
+} // namespace p9
+} // namespace openpower