blob: 64b41c10b09c6b00f6f4b1d30b318b3e17215835 [file] [log] [blame]
Matt Spinlerf716f322017-02-28 09:37:38 -06001/**
2 * Copyright © 2017 IBM Corporation
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Matt Spinler6419b632017-02-28 10:10:50 -060016#include <phosphor-logging/log.hpp>
17#include "cfam_access.hpp"
18#include "p9_cfam.hpp"
19#include "targeting.hpp"
20
Matt Spinlerf716f322017-02-28 09:37:38 -060021namespace openpower
22{
23namespace p9
24{
25
Matt Spinler6419b632017-02-28 10:10:50 -060026using namespace phosphor::logging;
27using namespace openpower::cfam::access;
28using namespace openpower::cfam::p9;
29using namespace openpower::targeting;
30
Matt Spinlerf716f322017-02-28 09:37:38 -060031
Matt Spinler83e37322017-03-09 11:23:17 -060032/**
33 * @brief Performs the 'VCS Workaround' on all P9s in the system.
34 * @return void
35 */
Matt Spinlerf716f322017-02-28 09:37:38 -060036void vcsWorkaround()
37{
Matt Spinler6419b632017-02-28 10:10:50 -060038 Targeting targets;
39 const auto& master = *(targets.begin());
Matt Spinlerf716f322017-02-28 09:37:38 -060040
Matt Spinler6419b632017-02-28 10:10:50 -060041 log<level::INFO>("Running P9 procedure vcsWorkaround",
42 entry("NUM_PROCS=%d", targets.size()));
43
44 //Set asynchronous clock mode
45 writeReg(master, P9_LL_MODE_REG, 0x00000001);
46
47 for (const auto& t : targets)
48 {
49 //Unfence PLL controls
50 writeRegWithMask(t, P9_ROOT_CTRL0,
51 0x00000000, 0x00010000);
52
53 //Assert Perv chiplet endpoint reset
54 writeRegWithMask(t, P9_PERV_CTRL0,
55 0x40000000, 0x40000000);
56
57 //Enable Nest PLL
58 writeRegWithMask(t, P9_PERV_CTRL0,
59 0x00000001, 0x00000001);
60 }
Matt Spinlerf716f322017-02-28 09:37:38 -060061}
62
63}
64}