commit	284fafc59f32528f92e8f0f49c76e08d6cfdf02c	[log] [tgz]
author	Joel Stanley <joel@jms.id.au>	Thu Nov 28 11:31:04 2019 +1030
committer	Brad Bishop <bradleyb@fuzziesquirrel.com>	Fri Dec 20 10:17:51 2019 -0500
tree	8c4481c3a51055bcb5d260cf6dc4b96c958252ff
parent	8bd2e6f39e3bbbedd0d7c3aea57827e2ff675855 [diff]

linux-aspeed: Move to v5.4

This moves the OpenBMC kernel to a Linux v5.4 base.

There are 161 patches in dev-5.4. Of these 69 are backported from
upstream, leaving 92 out of tree patches.

Alexander Amelkin (1):
      mtd: spi-nor: fix options for mx66l51235f

Andrew Jeffery (12):
      dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
      pmbus (max31785): Add support for devicetree configuration
      pmbus (core): One-shot retries for failure to set page
      pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
      pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
      soc: aspeed: Miscellaneous control interfaces
      ARM: dts: aspeed: witherspoon: Update max31785 node
      ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
      net: ftgmac100: Ungate RCLK for RMII on ASPEED MACs
      pinctrl: aspeed-g6: Fix LPC/eSPI mux configuration
      pinctrl: aspeed: Improve debug output
      soc: aspeed: Fail probe of lpc-ctrl if reserved memory is not aligned

Arnd Bergmann (1):
      ARM: aspeed: ast2500 is ARMv6K

Brad Bishop (4):
      ARM: dts: aspeed-g6: Expose SuperIO scratch registers
      soc: aspeed: lpc: Add G6 compatible strings
      ipmi: aspeed-g6: Add compatible strings
      reset: simple: Add AST2600 compatibility string

Cédric Le Goater (21):
      mtd: spi-nor: aspeed: use command mode for reads
      mtd: spi-nor: aspeed: add support for SPI dual IO read mode
      mtd: spi-nor: aspeed: link controller with the ahb clock
      mtd: spi-nor: aspeed: optimize read mode
      mtd: spi-nor: aspeed: limit the maximum SPI frequency
      mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
      mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
      mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
      mtd: spi-nor: aspeed: add support for the 4B opcodes
      mtd: spi-nor: Add support for w25q512jv
      mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
      mtd: spi-nor: aspeed: Introduce segment operations
      mtd: spi-nor: aspeed: add initial support for ast2600
      mtd: spi-nor: aspeed: Check for disabled segments on the AST2600
      mtd: spi-nor: aspeed: Introduce training operations per platform
      mtd: spi-nor: aspeed: Introduce a HCLK mask for training
      mtd: spi-nor: aspeed: check upper freq limit when doing training
      mtd: spi-nor: aspeed: add support for AST2600 training
      mtd: spi-nor: aspeed: fix training of multiple CS on the AST2600
      mtd: spi-nor: aspeed: Disable zero size segments on the AST2600
      /dev/mem: add a devmem kernel parameter to activate the device

Eddie James (5):
      i2c: aspeed: Add AST2600 compatible
      hwmon: (pmbus/ibm-cffps) Switch LEDs to blocking brightness call
      hwmon: (pmbus/ibm-cffps) Fix LED blink behavior
      hwmon: (pmbus/ibm-cffps) Add version detection capability
      ARM: dts: aspeed: rainier: Switch PSUs to unknown version

Fran Hsu (4):
      ARM: dts: nuvoton: Add NPCM730 common device tree
      ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
      ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree.
      ARM: dts: nuvoton: Add GPIOs and LEDs to GSJ device tree

George Hung (2):
      dt-binding: edac: add NPCM ECC documentation
      edac: npcm: Add Nuvoton NPCM7xx EDAC driver

Jae Hyun Yoo (13):
      ARM: dts: aspeed: peci: Add PECI node
      clk: ast2600: enable BCLK for PCI/PCIe bus always
      dt-bindings: Add PECI subsystem document
      Documentation: ioctl: Add ioctl numbers for PECI subsystem
      peci: Add support for PECI bus driver core
      dt-bindings: Add bindings document of Aspeed PECI adapter
      ARM: dts: aspeed: Add PECI node
      peci: Add Aspeed PECI adapter driver
      dt-bindings: mfd: Add Intel PECI client bindings document
      mfd: intel-peci-client: Add Intel PECI client driver
      Documentation: hwmon: Add documents for PECI hwmon drivers
      hwmon: Add PECI cputemp driver
      hwmon: Add PECI dimmtemp driver

Joel Stanley (9):
      ARM: dts: aspeed-g4: Expose SuperIO scratch registers
      ARM: dts: aspeed: ast2600evb: Enable FSI master
      usb: gadget: Quieten gadget config message
      clocksource: fttmr010: Parametrise shutdown
      clocksource: fttmr010: Set interrupt and shutdown
      clocksource: fttmr010: Add support for ast2600
      watchdog: aspeed: Fix clock behaviour for ast2600
      ARM: config: aspeed: Update defconfigs
      Revert "ARM: dts: aspeed: peci: Add PECI node"

Johnny Huang (6):
      pinctrl: aspeed-g6: Add AST2600 I3C1 and I3C2 pinmux config
      pinctrl: aspeed-g6: Add support for the AST2600 USB pinmux
      pinctrl: aspeed: Add ASPEED_SB_PINCONF() helper
      pinctrl: aspeed: Move aspeed_pin_config_map to separate source file
      pinctrl: aspeed: Use masks to describe pinconf bitfields
      pinctrl: aspeed-g6: Add AST2600 pinconf support

Tali Perry (2):
      dt-bindings: i2c: npcm7xx: add NPCM I2C controller documentation
      i2c: npcm: Add Nuvoton NPCM I2C controller driver

Tomer Maimon (12):
      dt-binding: bmc: Add NPCM7xx LPC BPC documentation
      misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
      dt-binding: bmc: add npcm7xx pci mailbox document
      misc: mbox: add npcm7xx pci mailbox driver
      dt-binding: net: document NPCM7xx EMC DT bindings
      net: npcm: add NPCM7xx Ethernet MAC controller
      ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
      ARM: dts: npcm7xx: Update device tree
      arm: dts: add NPCM7xx RunBMC Olympus Quanta device tree
      dt-bindings: peci: add NPCM PECI documentation
      ARM: dts: npcm7xx: Add PECI node
      peci: npcm: add NPCM PECI driver

(From meta-aspeed rev: 6d863dd22836673ccd2a5d40778a3d5e4e03d7ea)

Change-Id: I8f43925375c26bc88f94eee13430fcb03252b8ca
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>

4 files changed

tree: 8c4481c3a51055bcb5d260cf6dc4b96c958252ff

README.md

OpenBMC

The OpenBMC project can be described as a Linux distribution for embedded devices that have a BMC; typically, but not limited to, things like servers, top of rack switches or RAID appliances. The OpenBMC stack uses technologies such as Yocto, OpenEmbedded, systemd, and D-Bus to allow easy customization for your server platform.

Setting up your OpenBMC project

1) Prerequisite

Ubuntu 14.04

sudo apt-get install -y git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat

Fedora 28

sudo dnf install -y git patch diffstat texinfo chrpath SDL-devel bitbake \
    rpcgen perl-Thread-Queue perl-bignum perl-Crypt-OpenSSL-Bignum
sudo dnf groupinstall "C Development Tools and Libraries"

2) Download the source

git clone git@github.com:openbmc/openbmc.git
cd openbmc

3) Target your hardware

Any build requires an environment variable known as TEMPLATECONF to be set to a hardware target. You can see all of the known targets with find meta-* -name local.conf.sample. Choose the hardware target and then move to the next step. Additional examples can be found in the OpenBMC Cheatsheet

Machine	TEMPLATECONF
Palmetto	`meta-ibm/meta-palmetto/conf`
Zaius	`meta-ingrasys/meta-zaius/conf`
Witherspoon	`meta-ibm/meta-witherspoon/conf`
Romulus	`meta-ibm/meta-romulus/conf`

As an example target Romulus

export TEMPLATECONF=meta-ibm/meta-romulus/conf

4) Build

. openbmc-env
bitbake obmc-phosphor-image

Additional details can be found in the docs repository.

OpenBMC Development

The OpenBMC community maintains a set of tutorials new users can go through to get up to speed on OpenBMC development out here

Build Validation and Testing

Commits submitted by members of the OpenBMC GitHub community are compiled and tested via our Jenkins server. Commits are run through two levels of testing. At the repository level the makefile make check directive is run. At the system level, the commit is built into a firmware image and run with an arm-softmmu QEMU model against a barrage of CI tests.

Commits submitted by non-members do not automatically proceed through CI testing. After visual inspection of the commit, a CI run can be manually performed by the reviewer.

Automated testing against the QEMU model along with supported systems are performed. The OpenBMC project uses the Robot Framework for all automation. Our complete test repository can be found here.

Submitting Patches

Support of additional hardware and software packages is always welcome. Please follow the contributing guidelines when making a submission. It is expected that contributions contain test cases.

Bug Reporting

Issues are managed on GitHub. It is recommended you search through the issues before opening a new one.

Questions

First, please do a search on the internet. There's a good chance your question has already been asked.

For general questions, please use the openbmc tag on Stack Overflow. Please review the discussion on Stack Overflow licensing before posting any code.

For technical discussions, please see contact info below for IRC and mailing list information.

Features of OpenBMC

Feature List

Host management: Power, Cooling, LEDs, Inventory, Events, Watchdog
Full IPMI 2.0 Compliance with DCMI
Code Update Support for multiple BMC/BIOS images
Web-based user interface
REST interfaces
D-Bus based interfaces
SSH based SOL
Remote KVM
Hardware Simulation
Automated Testing

Features In Progress

OpenCompute Redfish Compliance
User management
Virtual media
Verified Boot

Features Requested but need help

OpenBMC performance monitoring

Finding out more

Dive deeper into OpenBMC by opening the docs repository.

Contact

Mail: openbmc@lists.ozlabs.org https://lists.ozlabs.org/listinfo/openbmc
IRC: #openbmc on freenode.net
Riot: #openbmc:matrix.org