Add meta-xilinx subtree
Import git://git.yoctoproject.org/meta-xilinx from 5fccc46503 as
meta-xilinx subtree.
Change-Id: I3d59bcf3a57cee588aab7f5cdd0287af66450c8a
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
new file mode 100644
index 0000000..45e488c
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/include/ "pl.dtsi"
+/include/ "system-conf.dtsi"
+/ {
+ hard-reset-gpios = <&reset_gpio 0 1>;
+ aliases {
+ ethernet0 = &axi_ethernet;
+ i2c0 = &iic_main;
+ serial0 = &rs232_uart;
+ };
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&iic_main {
+ i2cswitch@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x74>;
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ si570: clock-generator@5d {
+ #clock-cells = <0>;
+ compatible = "silabs,si570";
+ temperature-stability = <50>;
+ reg = <0x5d>;
+ factory-fout = <156250000>;
+ clock-frequency = <148500000>;
+ };
+ };
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ eeprom@54 {
+ compatible = "at,24c08";
+ reg = <0x54>;
+ };
+ };
+ };
+};
+
+&axi_ethernet {
+ phy-handle = <&phy0>;
+ axi_ethernet_mdio: mdio {
+ phy0: phy@7 {
+ device_type = "ethernet-phy";
+ reg = <7>;
+ };
+ };
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
new file mode 100644
index 0000000..43bc2ab
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
@@ -0,0 +1,445 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,microblaze";
+ model = "Xilinx MicroBlaze";
+ cpus {
+ #address-cells = <1>;
+ #cpus = <1>;
+ #size-cells = <0>;
+ microblaze_0: cpu@0 {
+ bus-handle = <&amba_pl>;
+ clock-frequency = <200000000>;
+ clocks = <&clk_cpu>;
+ compatible = "xlnx,microblaze-10.0";
+ d-cache-baseaddr = <0x0000000080000000>;
+ d-cache-highaddr = <0x00000000bfffffff>;
+ d-cache-line-size = <0x20>;
+ d-cache-size = <0x4000>;
+ device_type = "cpu";
+ i-cache-baseaddr = <0x0000000080000000>;
+ i-cache-highaddr = <0x00000000bfffffff>;
+ i-cache-line-size = <0x10>;
+ i-cache-size = <0x4000>;
+ interrupt-handle = <µblaze_0_axi_intc>;
+ model = "microblaze,10.0";
+ timebase-frequency = <200000000>;
+ xlnx,addr-size = <0x20>;
+ xlnx,addr-tag-bits = <0x10>;
+ xlnx,allow-dcache-wr = <0x1>;
+ xlnx,allow-icache-wr = <0x1>;
+ xlnx,area-optimized = <0x0>;
+ xlnx,async-interrupt = <0x1>;
+ xlnx,async-wakeup = <0x3>;
+ xlnx,avoid-primitives = <0x0>;
+ xlnx,base-vectors = <0x0000000000000000>;
+ xlnx,branch-target-cache-size = <0x0>;
+ xlnx,cache-byte-size = <0x4000>;
+ xlnx,d-axi = <0x1>;
+ xlnx,d-lmb = <0x1>;
+ xlnx,d-lmb-mon = <0x0>;
+ xlnx,daddr-size = <0x20>;
+ xlnx,data-size = <0x20>;
+ xlnx,dc-axi-mon = <0x0>;
+ xlnx,dcache-addr-tag = <0x10>;
+ xlnx,dcache-always-used = <0x1>;
+ xlnx,dcache-byte-size = <0x4000>;
+ xlnx,dcache-data-width = <0x0>;
+ xlnx,dcache-force-tag-lutram = <0x0>;
+ xlnx,dcache-line-len = <0x8>;
+ xlnx,dcache-use-writeback = <0x0>;
+ xlnx,dcache-victims = <0x0>;
+ xlnx,debug-counter-width = <0x20>;
+ xlnx,debug-enabled = <0x1>;
+ xlnx,debug-event-counters = <0x5>;
+ xlnx,debug-external-trace = <0x0>;
+ xlnx,debug-interface = <0x0>;
+ xlnx,debug-latency-counters = <0x1>;
+ xlnx,debug-profile-size = <0x0>;
+ xlnx,debug-trace-async-reset = <0x0>;
+ xlnx,debug-trace-size = <0x2000>;
+ xlnx,div-zero-exception = <0x1>;
+ xlnx,dp-axi-mon = <0x0>;
+ xlnx,dynamic-bus-sizing = <0x0>;
+ xlnx,ecc-use-ce-exception = <0x0>;
+ xlnx,edge-is-positive = <0x1>;
+ xlnx,enable-discrete-ports = <0x0>;
+ xlnx,endianness = <0x1>;
+ xlnx,fault-tolerant = <0x0>;
+ xlnx,fpu-exception = <0x0>;
+ xlnx,freq = <0xbebc200>;
+ xlnx,fsl-exception = <0x0>;
+ xlnx,fsl-links = <0x0>;
+ xlnx,i-axi = <0x0>;
+ xlnx,i-lmb = <0x1>;
+ xlnx,i-lmb-mon = <0x0>;
+ xlnx,iaddr-size = <0x20>;
+ xlnx,ic-axi-mon = <0x0>;
+ xlnx,icache-always-used = <0x1>;
+ xlnx,icache-data-width = <0x0>;
+ xlnx,icache-force-tag-lutram = <0x0>;
+ xlnx,icache-line-len = <0x4>;
+ xlnx,icache-streams = <0x1>;
+ xlnx,icache-victims = <0x8>;
+ xlnx,ill-opcode-exception = <0x1>;
+ xlnx,imprecise-exceptions = <0x0>;
+ xlnx,instr-size = <0x20>;
+ xlnx,interconnect = <0x2>;
+ xlnx,interrupt-is-edge = <0x0>;
+ xlnx,interrupt-mon = <0x0>;
+ xlnx,ip-axi-mon = <0x0>;
+ xlnx,lockstep-master = <0x0>;
+ xlnx,lockstep-select = <0x0>;
+ xlnx,lockstep-slave = <0x0>;
+ xlnx,mmu-dtlb-size = <0x4>;
+ xlnx,mmu-itlb-size = <0x2>;
+ xlnx,mmu-privileged-instr = <0x0>;
+ xlnx,mmu-tlb-access = <0x3>;
+ xlnx,mmu-zones = <0x2>;
+ xlnx,num-sync-ff-clk = <0x2>;
+ xlnx,num-sync-ff-clk-debug = <0x2>;
+ xlnx,num-sync-ff-clk-irq = <0x1>;
+ xlnx,num-sync-ff-dbg-clk = <0x1>;
+ xlnx,num-sync-ff-dbg-trace-clk = <0x2>;
+ xlnx,number-of-pc-brk = <0x1>;
+ xlnx,number-of-rd-addr-brk = <0x0>;
+ xlnx,number-of-wr-addr-brk = <0x0>;
+ xlnx,opcode-0x0-illegal = <0x1>;
+ xlnx,optimization = <0x0>;
+ xlnx,pc-width = <0x20>;
+ xlnx,piaddr-size = <0x20>;
+ xlnx,pvr = <0x2>;
+ xlnx,pvr-user1 = <0x00>;
+ xlnx,pvr-user2 = <0x00000000>;
+ xlnx,reset-msr = <0x00000000>;
+ xlnx,reset-msr-bip = <0x0>;
+ xlnx,reset-msr-dce = <0x0>;
+ xlnx,reset-msr-ee = <0x0>;
+ xlnx,reset-msr-eip = <0x0>;
+ xlnx,reset-msr-ice = <0x0>;
+ xlnx,reset-msr-ie = <0x0>;
+ xlnx,sco = <0x0>;
+ xlnx,trace = <0x0>;
+ xlnx,unaligned-exceptions = <0x1>;
+ xlnx,use-barrel = <0x1>;
+ xlnx,use-branch-target-cache = <0x0>;
+ xlnx,use-config-reset = <0x0>;
+ xlnx,use-dcache = <0x1>;
+ xlnx,use-div = <0x1>;
+ xlnx,use-ext-brk = <0x0>;
+ xlnx,use-ext-nm-brk = <0x0>;
+ xlnx,use-extended-fsl-instr = <0x0>;
+ xlnx,use-fpu = <0x0>;
+ xlnx,use-hw-mul = <0x2>;
+ xlnx,use-icache = <0x1>;
+ xlnx,use-interrupt = <0x2>;
+ xlnx,use-mmu = <0x3>;
+ xlnx,use-msr-instr = <0x1>;
+ xlnx,use-non-secure = <0x0>;
+ xlnx,use-pcmp-instr = <0x1>;
+ xlnx,use-reorder-instr = <0x1>;
+ xlnx,use-stack-protection = <0x0>;
+ };
+ };
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clk_cpu: clk_cpu@0 {
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "clk_cpu";
+ compatible = "fixed-clock";
+ reg = <0>;
+ };
+ clk_bus_0: clk_bus_0@1 {
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "clk_bus_0";
+ compatible = "fixed-clock";
+ reg = <1>;
+ };
+ };
+ amba_pl: amba_pl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges ;
+ axi_ethernet: ethernet@40c00000 {
+ axistream-connected = <&axi_ethernet_dma>;
+ axistream-control-connected = <&axi_ethernet_dma>;
+ clock-frequency = <100000000>;
+ compatible = "xlnx,axi-ethernet-1.00.a";
+ device_type = "network";
+ interrupt-parent = <µblaze_0_axi_intc>;
+ interrupts = <4 2>;
+ phy-mode = "gmii";
+ reg = <0x40c00000 0x40000>;
+ xlnx = <0x0>;
+ xlnx,axiliteclkrate = <0x0>;
+ xlnx,axisclkrate = <0x0>;
+ xlnx,clockselection = <0x0>;
+ xlnx,enableasyncsgmii = <0x0>;
+ xlnx,gt-type = <0x0>;
+ xlnx,gtinex = <0x0>;
+ xlnx,gtlocation = <0x0>;
+ xlnx,gtrefclksrc = <0x0>;
+ xlnx,include-dre ;
+ xlnx,instantiatebitslice0 = <0x0>;
+ xlnx,phy-type = <0x1>;
+ xlnx,phyaddr = <0x1>;
+ xlnx,rable = <0x0>;
+ xlnx,rxcsum = <0x0>;
+ xlnx,rxlane0-placement = <0x0>;
+ xlnx,rxlane1-placement = <0x0>;
+ xlnx,rxmem = <0x1000>;
+ xlnx,rxnibblebitslice0used = <0x0>;
+ xlnx,tx-in-upper-nibble = <0x1>;
+ xlnx,txcsum = <0x0>;
+ xlnx,txlane0-placement = <0x0>;
+ xlnx,txlane1-placement = <0x0>;
+ axi_ethernet_mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ axi_ethernet_dma: dma@41e00000 {
+ #dma-cells = <1>;
+ axistream-connected = <&axi_ethernet>;
+ axistream-control-connected = <&axi_ethernet>;
+ clock-frequency = <200000000>;
+ clock-names = "s_axi_lite_aclk";
+ clocks = <&clk_bus_0>;
+ compatible = "xlnx,eth-dma";
+ interrupt-parent = <µblaze_0_axi_intc>;
+ interrupts = <3 2 2 2>;
+ reg = <0x41e00000 0x10000>;
+ xlnx,include-dre ;
+ };
+ axi_timer_0: timer@41c00000 {
+ clock-frequency = <200000000>;
+ clocks = <&clk_bus_0>;
+ compatible = "xlnx,xps-timer-1.00.a";
+ interrupt-parent = <µblaze_0_axi_intc>;
+ interrupts = <5 2>;
+ reg = <0x41c00000 0x10000>;
+ xlnx,count-width = <0x20>;
+ xlnx,gen0-assert = <0x1>;
+ xlnx,gen1-assert = <0x1>;
+ xlnx,one-timer-only = <0x0>;
+ xlnx,trig0-assert = <0x1>;
+ xlnx,trig1-assert = <0x1>;
+ };
+ calib_complete_gpio: gpio@40010000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x40010000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x1>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ dip_switches_4bits: gpio@40020000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x40020000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x4>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ iic_main: i2c@40800000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <200000000>;
+ clocks = <&clk_bus_0>;
+ compatible = "xlnx,xps-iic-2.00.a";
+ interrupt-parent = <µblaze_0_axi_intc>;
+ interrupts = <1 2>;
+ reg = <0x40800000 0x10000>;
+ };
+ led_8bits: gpio@40030000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x40030000 0x10000>;
+ xlnx,all-inputs = <0x0>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x1>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x8>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ linear_flash: flash@60000000 {
+ bank-width = <2>;
+ compatible = "cfi-flash";
+ reg = <0x60000000 0x8000000>;
+ xlnx,axi-clk-period-ps = <0x1388>;
+ xlnx,include-datawidth-matching-0 = <0x1>;
+ xlnx,include-datawidth-matching-1 = <0x1>;
+ xlnx,include-datawidth-matching-2 = <0x1>;
+ xlnx,include-datawidth-matching-3 = <0x1>;
+ xlnx,include-negedge-ioregs = <0x0>;
+ xlnx,lflash-period-ps = <0x1388>;
+ xlnx,linear-flash-sync-burst = <0x0>;
+ xlnx,max-mem-width = <0x10>;
+ xlnx,mem-a-lsb = <0x0>;
+ xlnx,mem-a-msb = <0x1f>;
+ xlnx,mem0-type = <0x2>;
+ xlnx,mem0-width = <0x10>;
+ xlnx,mem1-type = <0x0>;
+ xlnx,mem1-width = <0x10>;
+ xlnx,mem2-type = <0x0>;
+ xlnx,mem2-width = <0x10>;
+ xlnx,mem3-type = <0x0>;
+ xlnx,mem3-width = <0x10>;
+ xlnx,num-banks-mem = <0x1>;
+ xlnx,page-size = <0x10>;
+ xlnx,parity-type-mem-0 = <0x0>;
+ xlnx,parity-type-mem-1 = <0x0>;
+ xlnx,parity-type-mem-2 = <0x0>;
+ xlnx,parity-type-mem-3 = <0x0>;
+ xlnx,port-diff = <0x0>;
+ xlnx,s-axi-en-reg = <0x0>;
+ xlnx,s-axi-mem-addr-width = <0x20>;
+ xlnx,s-axi-mem-data-width = <0x20>;
+ xlnx,s-axi-mem-id-width = <0x1>;
+ xlnx,s-axi-reg-addr-width = <0x5>;
+ xlnx,s-axi-reg-data-width = <0x20>;
+ xlnx,synch-pipedelay-0 = <0x1>;
+ xlnx,synch-pipedelay-1 = <0x1>;
+ xlnx,synch-pipedelay-2 = <0x1>;
+ xlnx,synch-pipedelay-3 = <0x1>;
+ xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
+ xlnx,tavdv-ps-mem-1 = <0x3a98>;
+ xlnx,tavdv-ps-mem-2 = <0x3a98>;
+ xlnx,tavdv-ps-mem-3 = <0x3a98>;
+ xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
+ xlnx,tcedv-ps-mem-1 = <0x3a98>;
+ xlnx,tcedv-ps-mem-2 = <0x3a98>;
+ xlnx,tcedv-ps-mem-3 = <0x3a98>;
+ xlnx,thzce-ps-mem-0 = <0x88b8>;
+ xlnx,thzce-ps-mem-1 = <0x1b58>;
+ xlnx,thzce-ps-mem-2 = <0x1b58>;
+ xlnx,thzce-ps-mem-3 = <0x1b58>;
+ xlnx,thzoe-ps-mem-0 = <0x1b58>;
+ xlnx,thzoe-ps-mem-1 = <0x1b58>;
+ xlnx,thzoe-ps-mem-2 = <0x1b58>;
+ xlnx,thzoe-ps-mem-3 = <0x1b58>;
+ xlnx,tlzwe-ps-mem-0 = <0xc350>;
+ xlnx,tlzwe-ps-mem-1 = <0x0>;
+ xlnx,tlzwe-ps-mem-2 = <0x0>;
+ xlnx,tlzwe-ps-mem-3 = <0x0>;
+ xlnx,tpacc-ps-flash-0 = <0x61a8>;
+ xlnx,tpacc-ps-flash-1 = <0x61a8>;
+ xlnx,tpacc-ps-flash-2 = <0x61a8>;
+ xlnx,tpacc-ps-flash-3 = <0x61a8>;
+ xlnx,twc-ps-mem-0 = <0x11170>;
+ xlnx,twc-ps-mem-1 = <0x3a98>;
+ xlnx,twc-ps-mem-2 = <0x3a98>;
+ xlnx,twc-ps-mem-3 = <0x3a98>;
+ xlnx,twp-ps-mem-0 = <0x13880>;
+ xlnx,twp-ps-mem-1 = <0x2ee0>;
+ xlnx,twp-ps-mem-2 = <0x2ee0>;
+ xlnx,twp-ps-mem-3 = <0x2ee0>;
+ xlnx,twph-ps-mem-0 = <0x13880>;
+ xlnx,twph-ps-mem-1 = <0x2ee0>;
+ xlnx,twph-ps-mem-2 = <0x2ee0>;
+ xlnx,twph-ps-mem-3 = <0x2ee0>;
+ xlnx,use-startup = <0x0>;
+ xlnx,use-startup-int = <0x0>;
+ xlnx,wr-rec-time-mem-0 = <0x186a0>;
+ xlnx,wr-rec-time-mem-1 = <0x6978>;
+ xlnx,wr-rec-time-mem-2 = <0x6978>;
+ xlnx,wr-rec-time-mem-3 = <0x6978>;
+ };
+ microblaze_0_axi_intc: interrupt-controller@41200000 {
+ #interrupt-cells = <2>;
+ compatible = "xlnx,xps-intc-1.00.a";
+ interrupt-controller ;
+ reg = <0x41200000 0x10000>;
+ xlnx,kind-of-intr = <0x0>;
+ xlnx,num-intr-inputs = <0x6>;
+ };
+ push_buttons_5bits: gpio@40040000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x40040000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x5>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ reset_gpio: gpio@40000000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x40000000 0x10000>;
+ xlnx,all-inputs = <0x0>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x1>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x1>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ rs232_uart: serial@44a00000 {
+ clock-frequency = <200000000>;
+ clocks = <&clk_bus_0>;
+ compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a";
+ current-speed = <115200>;
+ device_type = "serial";
+ interrupt-parent = <µblaze_0_axi_intc>;
+ interrupts = <0 2>;
+ port-number = <0>;
+ reg = <0x44a00000 0x10000>;
+ reg-offset = <0x1000>;
+ reg-shift = <2>;
+ xlnx,external-xin-clk-hz = <0x17d7840>;
+ xlnx,external-xin-clk-hz-d = <0x19>;
+ xlnx,has-external-rclk = <0x0>;
+ xlnx,has-external-xin = <0x0>;
+ xlnx,is-a-16550 = <0x1>;
+ xlnx,s-axi-aclk-freq-hz-d = "200.0";
+ xlnx,use-modem-ports = <0x1>;
+ xlnx,use-user-ports = <0x1>;
+ };
+ };
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
new file mode 100644
index 0000000..09b26c6
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
@@ -0,0 +1,43 @@
+/*
+ * CAUTION: This file is automatically generated by PetaLinux SDK.
+ * DO NOT modify this file
+ */
+
+
+/ {
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&axi_ethernet {
+ local-mac-address = [00 0a 35 00 22 01];
+};
+
+&linear_flash {
+ reg = <0x60000000 0x08000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0x00000000 {
+ label = "fpga";
+ reg = <0x00000000 0x00b00000>;
+ };
+ partition@0x00b00000 {
+ label = "boot";
+ reg = <0x00b00000 0x00080000>;
+ };
+ partition@0x00b80000 {
+ label = "bootenv";
+ reg = <0x00b80000 0x00020000>;
+ };
+ partition@0x00ba0000 {
+ label = "kernel";
+ reg = <0x00ba0000 0x00c00000>;
+ };
+ partition@0x017a0000 {
+ label = "spare";
+ reg = <0x017a0000 0x00000000>;
+ };
+};
+
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts
new file mode 100644
index 0000000..b9376a4
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/microzed-zynq7.dts
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2011 - 2014 Xilinx
+ * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq MicroZED Development Board";
+ compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+
+ usb_phy0: phy0 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðernet_phy>;
+
+ ethernet_phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+ usb-phy = <&usb_phy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&pinctrl0 {
+ pinctrl_usb0_default: usb0-default {
+ mux {
+ groups = "usb0_0_grp";
+ function = "usb0";
+ };
+
+ conf {
+ groups = "usb0_0_grp";
+ slew-rate = <0>;
+ io-standard = <1>;
+ };
+
+ conf-rx {
+ pins = "MIO29", "MIO31", "MIO36";
+ bias-high-impedance;
+ };
+
+ conf-tx {
+ pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+ "MIO35", "MIO37", "MIO38", "MIO39";
+ bias-disable;
+ };
+ };
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts
new file mode 100644
index 0000000..4ec64f5
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts
@@ -0,0 +1,98 @@
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+/include/ "zynq-7000-qspi-dummy.dtsi"
+
+/ {
+ model = "Avnet picoZed";
+ compatible = "avnet,picozed", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+
+ usb_phy0: phy0 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ reset-gpios = <&gpio0 7 1>; /* MIO 7, GPIO_ACTIVE_LOW */
+ };
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðernet_phy>;
+
+ ethernet_phy: ethernet-phy@0 {
+ compatible = "marvell,88e1512";
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+&sdhci1 {
+ status = "okay";
+ /* SD1 is onnected to a non-removable eMMC flash device */
+ non-removable;
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+ usb-phy = <&usb_phy0>;
+};
+
+&qspi {
+ status = "okay";
+ primary_flash: ps7-qspi@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,m25p80", "spansion,s25fl128s", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-max-frequency = <50000000>;
+ /* Example 16M partition table using U-Boot + U-Boot SPL */
+ partition@0x0 {
+ label = "boot";
+ reg = <0x0 0xe0000>;
+ };
+ partition@0xe0000 {
+ label = "ubootenv";
+ reg = <0xe0000 0x20000>;
+ };
+ partition@0x100000 {
+ label = "uboot";
+ reg = <0x100000 0x100000>;
+ };
+ partition@0x200000 {
+ label = "kernel";
+ reg = <0x200000 0x4f0000>;
+ };
+ partition@0x6f0000 {
+ label = "devicetree";
+ reg = <0x6f0000 0x10000>;
+ };
+ partition@0x700000 {
+ label = "rootfs";
+ reg = <0x700000 0x400000>;
+ };
+ partition@0xb00000 {
+ label = "spare";
+ reg = <0xb00000 0x500000>;
+ };
+ };
+};
+
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts
new file mode 100644
index 0000000..cd0694d
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts
@@ -0,0 +1,85 @@
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+/include/ "zynq-7000-qspi-dummy.dtsi"
+
+/ {
+ model = "Zynq A9 QEMU";
+ compatible = "qemu,xilinx-zynq-a9", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&amba {
+ /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */
+ fixednetclk: clock {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+ };
+};
+
+&gem0 {
+ status = "okay";
+ clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>;
+ phy-mode = "rgmii-id";
+ phy-handle = <ðernet_phy>;
+
+ ethernet_phy: ethernet-phy@23 {
+ device_type = "ethernet-phy";
+ reg = <23>;
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&qspi {
+ status = "okay";
+ is-dual = <1>;
+ primary_flash: ps7-qspi@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <50000000>;
+ partition@0x00000000 {
+ label = "boot";
+ reg = <0x00000000 0x00500000>;
+ };
+ partition@0x00500000 {
+ label = "bootenv";
+ reg = <0x00500000 0x00020000>;
+ };
+ partition@0x00520000 {
+ label = "config";
+ reg = <0x00520000 0x00020000>;
+ };
+ partition@0x00540000 {
+ label = "image";
+ reg = <0x00540000 0x00a80000>;
+ };
+ partition@0x00fc0000 {
+ label = "spare";
+ reg = <0x00fc0000 0x00000000>;
+ };
+ };
+};
+
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
new file mode 100644
index 0000000..0f678d3
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
@@ -0,0 +1,63 @@
+/*
+ * CAUTION: This file is automatically generated by Xilinx.
+ * Version: HSI 2015.4
+ * Today is: Fri Mar 4 15:40:49 2016
+*/
+
+
+/ {
+ cpus {
+ cpu@0 {
+ operating-points = <650000 1000000 325000 1000000>;
+ };
+ };
+};
+&gem0 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+ xlnx,ptp-enet-clock = <0x6750918>;
+};
+&gpio0 {
+ emio-gpio-width = <64>;
+ gpio-mask-high = <0x0>;
+ gpio-mask-low = <0x5600>;
+};
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+&intc {
+ num_cpus = <2>;
+ num_interrupts = <96>;
+};
+&qspi {
+ is-dual = <0>;
+ num-cs = <1>;
+ status = "okay";
+};
+&sdhci0 {
+ status = "okay";
+ xlnx,has-cd = <0x1>;
+ xlnx,has-power = <0x0>;
+ xlnx,has-wp = <0x1>;
+};
+&uart1 {
+ current-speed = <115200>;
+ device_type = "serial";
+ port-number = <0>;
+ status = "okay";
+};
+&usb0 {
+ dr_mode = "host";
+ phy_type = "ulpi";
+ status = "okay";
+ usb-reset = <&gpio0 46 0>;
+};
+&clkc {
+ fclk-enable = <0x3>;
+ ps-clk-frequency = <50000000>;
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi
new file mode 100644
index 0000000..32bc768
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi
@@ -0,0 +1,215 @@
+/*
+ * CAUTION: This file is automatically generated by Xilinx.
+ * Version: HSI 2015.4
+ * Today is: Fri Mar 4 15:40:49 2016
+*/
+
+
+/ {
+ amba_pl: amba_pl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges ;
+ axi_dynclk_0: axi_dynclk@43c10000 {
+ compatible = "xlnx,axi-dynclk-1.0";
+ reg = <0x43c10000 0x10000>;
+ xlnx,s00-axi-addr-width = <0x5>;
+ xlnx,s00-axi-data-width = <0x20>;
+ };
+ axi_gpio_btn: gpio@41210000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x41210000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x4>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_gpio_hdmi: gpio@41230000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ interrupt-parent = <&intc>;
+ interrupts = <0 29 4>;
+ reg = <0x41230000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x1>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x1>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_gpio_led: gpio@41200000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x41200000 0x10000>;
+ xlnx,all-inputs = <0x0>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x1>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x4>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_gpio_sw: gpio@41220000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x41220000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x4>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_i2s_adi_0: axi_i2s_adi@43c20000 {
+ compatible = "xlnx,axi-i2s-adi-1.0";
+ reg = <0x43c20000 0x10000>;
+ xlnx,bclk-pol = <0x0>;
+ xlnx,dma-type = <0x1>;
+ xlnx,has-rx = <0x1>;
+ xlnx,has-tx = <0x1>;
+ xlnx,lrclk-pol = <0x0>;
+ xlnx,num-ch = <0x1>;
+ xlnx,s-axi-min-size = <0x000001FF>;
+ xlnx,slot-width = <0x18>;
+ };
+ axi_vdma_0: dma@43000000 {
+ #dma-cells = <1>;
+ compatible = "xlnx,axi-vdma-1.00.a";
+ clocks = <&clkc 15>;
+ clock-names = "s_axi_lite_aclk";
+ interrupt-parent = <&intc>;
+ interrupts = <0 30 4>;
+ reg = <0x43000000 0x10000>;
+ xlnx,flush-fsync = <0x1>;
+ xlnx,num-fstores = <0x1>;
+ dma-channel@43000000 {
+ compatible = "xlnx,axi-vdma-mm2s-channel";
+ interrupts = <0 30 4>;
+ xlnx,datawidth = <0x20>;
+ xlnx,device-id = <0x0>;
+ };
+ };
+ v_tc_0: v_tc@43c00000 {
+ compatible = "xlnx,v-tc-6.1";
+ interrupt-parent = <&intc>;
+ interrupts = <0 31 4>;
+ reg = <0x43c00000 0x10000>;
+ xlnx,det-achroma-en = <0x0>;
+ xlnx,det-avideo-en = <0x1>;
+ xlnx,det-fieldid-en = <0x0>;
+ xlnx,det-hblank-en = <0x1>;
+ xlnx,det-hsync-en = <0x1>;
+ xlnx,det-vblank-en = <0x1>;
+ xlnx,det-vsync-en = <0x1>;
+ xlnx,detect-en = <0x0>;
+ xlnx,fsync-hstart0 = <0x0>;
+ xlnx,fsync-hstart1 = <0x0>;
+ xlnx,fsync-hstart10 = <0x0>;
+ xlnx,fsync-hstart11 = <0x0>;
+ xlnx,fsync-hstart12 = <0x0>;
+ xlnx,fsync-hstart13 = <0x0>;
+ xlnx,fsync-hstart14 = <0x0>;
+ xlnx,fsync-hstart15 = <0x0>;
+ xlnx,fsync-hstart2 = <0x0>;
+ xlnx,fsync-hstart3 = <0x0>;
+ xlnx,fsync-hstart4 = <0x0>;
+ xlnx,fsync-hstart5 = <0x0>;
+ xlnx,fsync-hstart6 = <0x0>;
+ xlnx,fsync-hstart7 = <0x0>;
+ xlnx,fsync-hstart8 = <0x0>;
+ xlnx,fsync-hstart9 = <0x0>;
+ xlnx,fsync-vstart0 = <0x0>;
+ xlnx,fsync-vstart1 = <0x0>;
+ xlnx,fsync-vstart10 = <0x0>;
+ xlnx,fsync-vstart11 = <0x0>;
+ xlnx,fsync-vstart12 = <0x0>;
+ xlnx,fsync-vstart13 = <0x0>;
+ xlnx,fsync-vstart14 = <0x0>;
+ xlnx,fsync-vstart15 = <0x0>;
+ xlnx,fsync-vstart2 = <0x0>;
+ xlnx,fsync-vstart3 = <0x0>;
+ xlnx,fsync-vstart4 = <0x0>;
+ xlnx,fsync-vstart5 = <0x0>;
+ xlnx,fsync-vstart6 = <0x0>;
+ xlnx,fsync-vstart7 = <0x0>;
+ xlnx,fsync-vstart8 = <0x0>;
+ xlnx,fsync-vstart9 = <0x0>;
+ xlnx,gen-achroma-en = <0x0>;
+ xlnx,gen-achroma-polarity = <0x1>;
+ xlnx,gen-auto-switch = <0x0>;
+ xlnx,gen-avideo-en = <0x1>;
+ xlnx,gen-avideo-polarity = <0x1>;
+ xlnx,gen-cparity = <0x0>;
+ xlnx,gen-f0-vblank-hend = <0x500>;
+ xlnx,gen-f0-vblank-hstart = <0x500>;
+ xlnx,gen-f0-vframe-size = <0x2ee>;
+ xlnx,gen-f0-vsync-hend = <0x500>;
+ xlnx,gen-f0-vsync-hstart = <0x500>;
+ xlnx,gen-f0-vsync-vend = <0x2d9>;
+ xlnx,gen-f0-vsync-vstart = <0x2d4>;
+ xlnx,gen-f1-vblank-hend = <0x500>;
+ xlnx,gen-f1-vblank-hstart = <0x500>;
+ xlnx,gen-f1-vframe-size = <0x2ee>;
+ xlnx,gen-f1-vsync-hend = <0x500>;
+ xlnx,gen-f1-vsync-hstart = <0x500>;
+ xlnx,gen-f1-vsync-vend = <0x2d9>;
+ xlnx,gen-f1-vsync-vstart = <0x2d4>;
+ xlnx,gen-fieldid-en = <0x0>;
+ xlnx,gen-fieldid-polarity = <0x1>;
+ xlnx,gen-hactive-size = <0x500>;
+ xlnx,gen-hblank-en = <0x1>;
+ xlnx,gen-hblank-polarity = <0x1>;
+ xlnx,gen-hframe-size = <0x672>;
+ xlnx,gen-hsync-en = <0x1>;
+ xlnx,gen-hsync-end = <0x596>;
+ xlnx,gen-hsync-polarity = <0x1>;
+ xlnx,gen-hsync-start = <0x56e>;
+ xlnx,gen-interlaced = <0x0>;
+ xlnx,gen-vactive-size = <0x2d0>;
+ xlnx,gen-vblank-en = <0x1>;
+ xlnx,gen-vblank-polarity = <0x1>;
+ xlnx,gen-video-format = <0x2>;
+ xlnx,gen-vsync-en = <0x1>;
+ xlnx,gen-vsync-polarity = <0x1>;
+ xlnx,generate-en = <0x1>;
+ xlnx,has-axi4-lite = <0x1>;
+ xlnx,has-intc-if = <0x0>;
+ xlnx,interlace-en = <0x0>;
+ xlnx,max-lines = <0x1000>;
+ xlnx,max-pixels = <0x1000>;
+ xlnx,num-fsyncs = <0x1>;
+ xlnx,sync-en = <0x0>;
+ };
+ };
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts
new file mode 100644
index 0000000..1965439
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts
@@ -0,0 +1,184 @@
+/dts-v1/;
+/include/ "skeleton.dtsi"
+/include/ "zynq-7000.dtsi"
+/include/ "zynq-7000-qspi-dummy.dtsi"
+/include/ "pcw.dtsi"
+/include/ "pl.dtsi"
+
+/ {
+ model = "Digilent-Zybo-Linux-BD-v2015.4";
+ aliases {
+ serial0 = &uart1;
+ ethernet0 = &gem0;
+ spi0 = &qspi;
+ };
+ chosen {
+ bootargs = "";
+ stdout-path = "serial0:115200n8";
+ };
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x20000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+ btn4 {
+ label = "btn4";
+ gpios = <&gpio0 50 0>;
+ linux,code = <108>; /* down */
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ btn5 {
+ label = "btn5";
+ gpios = <&gpio0 51 0>;
+ linux,code = <103>; /* up */
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ };
+
+ usb_phy0: usb_phy@0 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ reset-gpios = <&gpio0 46 1>;
+ };
+};
+
+&amba {
+ u-boot,dm-pre-reloc;
+};
+
+&amba_pl {
+ encoder_0: digilent_encoder {
+ compatible = "digilent,drm-encoder";
+ dglnt,edid-i2c = <&i2c1>;
+ };
+
+ xilinx_drm {
+ compatible = "xlnx,drm";
+ xlnx,vtc = <&v_tc_0>;
+ xlnx,connector-type = "HDMIA";
+ xlnx,encoder-slave = <&encoder_0>;
+ clocks = <&axi_dynclk_0>;
+ planes {
+ xlnx,pixel-format = "xrgb8888";
+ plane0 {
+ dmas = <&axi_vdma_0 0>;
+ dma-names = "dma0";
+ };
+ };
+ };
+
+ i2s_clk: i2s_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <12288000>;
+ clock-output-names = "i2s_clk";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "ZYBO-Sound-Card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink0_master>;
+ simple-audio-card,frame-master = <&dailink0_master>;
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+ "Line", "Line In Jack";
+ simple-audio-card,routing =
+ "MICIN", "Microphone Jack",
+ "Headphone Jack", "LHPOUT",
+ "Headphone Jack", "RHPOUT",
+ "LLINEIN", "Line In Jack",
+ "RLINEIN", "Line In Jack";
+ dailink0_master: simple-audio-card,cpu {
+ clocks = <&i2s_clk>;
+ sound-dai = <&axi_i2s_adi_0>;
+ };
+ simple-audio-card,codec {
+ clocks = <&i2s_clk>;
+ sound-dai = <&ssm2603>;
+ };
+ };
+};
+
+&axi_dynclk_0 {
+ compatible = "digilent,axi-dynclk";
+ #clock-cells = <0>;
+ clocks = <&clkc 15>;
+};
+
+&axi_i2s_adi_0 {
+ #sound-dai-cells = <0>;
+ compatible = "adi,axi-i2s-1.00.a";
+ clocks = <&clkc 15>, <&i2s_clk>;
+ clock-names = "axi", "ref";
+ dmas = <&dmac_s 0 &dmac_s 1>;
+ dma-names = "tx", "rx";
+};
+
+&gem0 {
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+ local-mac-address = [];
+ phy0: phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+&i2c0 {
+ eeprom@50 {
+ /* Microchip 24AA02E48 */
+ compatible = "microchip,24c02";
+ reg = <0x50>;
+ };
+
+ ssm2603: ssm2603@1a{
+ #sound-dai-cells = <0>;
+ compatible = "adi,ssm2603";
+ reg = <0x1a>;
+ };
+};
+
+&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash0: flash@0 {
+ compatible = "micron,m25p80", "s25fl128s";
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
+ partition@0x00000000 {
+ label = "boot";
+ reg = <0x00000000 0x00300000>;
+ };
+ partition@0x00300000 {
+ label = "bootenv";
+ reg = <0x00300000 0x00020000>;
+ };
+ partition@0x00320000 {
+ label = "kernel";
+ reg = <0x00320000 0x00a80000>;
+ };
+ partition@0x00da0000 {
+ label = "spare";
+ reg = <0x00da0000 0x00000000>;
+ };
+ };
+};
+
+&usb0 {
+ usb-phy = <&usb_phy0>;
+};
+
+&v_tc_0 {
+ compatible = "xlnx,v-tc-5.01.a";
+};
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zynq-7000-qspi-dummy.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zynq-7000-qspi-dummy.dtsi
new file mode 100644
index 0000000..d059a2d
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zynq-7000-qspi-dummy.dtsi
@@ -0,0 +1,4 @@
+&amba {
+ /* empty defintion for kernels that don't have qspi node */
+ qspi: spi@e000d000 { };
+};