commit 991b2b8bdbc950f2a85aebfc29d1b34ea3264686
author Vernon Mauery <vernon.mauery@linux.intel.com> Mon Sep 26 16:16:45 2022 -0700
committer Vernon Mauery <vernon.mauery@linux.intel.com> Mon Sep 26 16:21:23 2022 -0700
tree 2ce9e9d4964b8b6e8ba71191a1dd8e693e4eaeb6
parent a1a46a94405db4fc29d9ad695dee44e2214e4262

Port in intel-dbus-interfaces content

This takes the com.intel.Control.* content from the
intel-dbus-interfaces repo and puts it into the yaml/com/intel subdir.

Tested:
    meson build -Ddata_com_intel=true && ninja -C build
    Configures and builds, creating a library with the
    com.intel.Control.* interfaces in it (inspected using nm)

Change-Id: I42b07b734483a4a2c9ba89e1bcadbc08d5b074b5
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>

yaml/com/intel/Control/NMISource.interface.yaml

diff --git a/yaml/com/intel/Control/NMISource.interface.yaml b/yaml/com/intel/Control/NMISource.interface.yaml
new file mode 100644
index 0000000..a172159
--- /dev/null
+++ b/yaml/com/intel/Control/NMISource.interface.yaml
@@ -0,0 +1,46 @@
+description: >
+    An interface for NMI signal source.
+properties:
+    - name: BMCSource
+      type: enum[self.BMCSourceSignal]
+      description: >
+          Keeps track of NMI signal source in BMC.
+      default: 'None'
+    - name: Enabled
+      type: boolean
+      description: >
+          whether the BMC enables NMI event.
+      default: true
+
+enumerations:
+   - name: BMCSourceSignal
+     description: >
+       The type of NMI source.
+     values:
+       - name: None
+         description: >
+           NONE NMI signal.
+       - name: FpBtn
+         description: >
+           Via Front Panel NMI button.
+       - name: WdPreTimeout
+         description: >
+           Via watchdog pre-timeout.
+       - name: PefMatch
+         description: >
+           Via PEF match.
+       - name: ChassisCmd
+         description: >
+           Via Chassis command.
+       - name: MemoryError
+         description: >
+           Via memory error.
+       - name: PciSerrPerr
+         description: >
+           Via PCI SERR PERR.
+       - name: SouthbridgeNmi
+         description: >
+           Via southbridge NMI.
+       - name: ChipsetNmi
+         description: >
+           Via chipset NMI.