| Brad Bishop | a948d26 | 2016-10-05 19:51:48 -0400 | [diff] [blame] | 1 | description: > |
| 2 | Implement to provide CPU attributes. |
| Cheng C Yang | 259f49e | 2020-02-25 10:07:32 +0800 | [diff] [blame] | 3 | properties: |
| 4 | - name: Socket |
| 5 | type: string |
| 6 | description: > |
| 7 | Processor Socket designation on MotherBoard. |
| 8 | - name: Family |
| 9 | type: string |
| 10 | description: > |
| 11 | A free form string indicates processor family type. |
| 12 | For example, values can be "Intel Xeon |
| 13 | processor", "AS400 Family", etc. |
| Brandon Kim | 40a42aa | 2021-09-09 19:17:04 -0700 | [diff] [blame] | 14 | - name: Model |
| 15 | type: string |
| 16 | description: > |
| 17 | The effective Model information as provided by the |
| 18 | manufacturer of this processor. |
| Cheng C Yang | 259f49e | 2020-02-25 10:07:32 +0800 | [diff] [blame] | 19 | - name: Id |
| 20 | type: uint64 |
| 21 | description: > |
| 22 | This Processor ID field contains processor-specific information |
| 23 | that describes the processor's features. Details depend on |
| 24 | processor architecture. |
| 25 | For x86 and ARM processors, DMTF DSP0134 Section 7.5.3 is used. |
| 26 | default: 0 |
| 27 | - name: MaxSpeedInMhz |
| 28 | type: uint32 |
| 29 | description: > |
| 30 | Max Speed in megahertz the CPU can support. |
| 31 | - name: Characteristics |
| 32 | type: array[enum[self.Capability]] |
| 33 | description: > |
| 34 | The set of boolean flags for processor's capability, such as |
| 35 | 64-bit Capable, Multi-Core, Hardware Thread, Execute Protection, |
| 36 | Enhanced Virtualization, Power/Performance Control etc. |
| 37 | - name: CoreCount |
| 38 | type: uint16 |
| 39 | description: > |
| 40 | The number of cores in the processor. |
| 41 | - name: ThreadCount |
| 42 | type: uint16 |
| 43 | description: > |
| 44 | The maximum number of threads the processor can support. |
| Brandon Kim | d81cff3 | 2021-09-01 10:00:13 -0700 | [diff] [blame] | 45 | - name: Step |
| 46 | type: string |
| 47 | description: > |
| 48 | The step value for this processor |
| 49 | - name: Microcode |
| 50 | type: string |
| 51 | description: > |
| 52 | The microcode information for this processor |
| Cheng C Yang | 259f49e | 2020-02-25 10:07:32 +0800 | [diff] [blame] | 53 | |
| 54 | enumerations: |
| 55 | - name: Capability |
| 56 | description: > |
| 57 | List of capabilities that a processor can support. |
| 58 | Values are based off DMTF DSP0134 specification. |
| 59 | values: |
| 60 | - name: Capable64bit |
| 61 | description: > |
| 62 | Capable of 64-bit. |
| 63 | - name: MultiCore |
| 64 | description: > |
| 65 | Support multi-core. |
| 66 | - name: HardwareThread |
| 67 | description: > |
| 68 | Support hardware thread. |
| 69 | - name: ExecuteProtection |
| 70 | description: > |
| 71 | Support execute protection. |
| 72 | - name: EnhancedVirtualization |
| 73 | description: > |
| 74 | Support enhanced virtualization. |
| 75 | - name: PowerPerformanceControl |
| 76 | description: > |
| Brandon Kim | d81cff3 | 2021-09-01 10:00:13 -0700 | [diff] [blame] | 77 | Support power/performance control. |
| Brad Bishop | df55704 | 2021-10-04 15:51:11 -0400 | [diff] [blame^] | 78 | |
| 79 | associations: |
| 80 | - name: associated_pcie_slots |
| 81 | description: > |
| 82 | Objects that implement Cpu can optionally implement the |
| 83 | associated_pcie_slots association to provide a link to one or more |
| 84 | PCIe slots. |
| 85 | reverse_name: upstream_processor |
| 86 | required_endpoint_interfaces: |
| 87 | - xyz.openbmc_project.Inventory.Item.PCIeSlot |