tools: p2a: check aspeed bridge
Check whether the pci-to-ahb bridge is enabled. It should be enabled
because this comes after the firmware blob is opened for writing.
Tested: Verified it reports the correct state of the value.
Change-Id: I04bd21fdbf65938164f5845c0ec46e2231b17bd9
Signed-off-by: Patrick Venture <venture@google.com>
diff --git a/tools/p2a.cpp b/tools/p2a.cpp
index 6d0ab37..6d4b693 100644
--- a/tools/p2a.cpp
+++ b/tools/p2a.cpp
@@ -24,17 +24,56 @@
bool P2aDataHandler::sendContents(const std::string& input,
std::uint16_t session)
{
+ PciDevice result;
PciUtilImpl pci;
PciFilter filter;
filter.vid = aspeedVendorId;
filter.did = aspeedDeviceId;
+ /* Find the ASPEED PCI device entry we want. */
auto output = pci.getPciDevices(filter);
for (const auto& d : output)
{
- std::fprintf(stderr, "0x%x", d.vid);
+ std::fprintf(stderr, "[0x%x 0x%x] ", d.vid, d.did);
+
+ /* Verify it's a memory-based bar -- we want bar1. */
+ pciaddr_t bar1 = d.bars[1];
+ if ((bar1 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
+ {
+ /* We want it to not be IO-based access. */
+ continue;
+ }
+
+ result = d;
}
+ std::fprintf(stderr, "\n");
+
+ /* We sent the open command before this, so the window should be open and
+ * the bridge enabled.
+ */
+ std::uint32_t value;
+ if (!io->read(result.bars[1] | aspeedP2aConfig, sizeof(value), &value))
+ {
+ if (0 == (value & p2ABridgeEnabled))
+ {
+ std::fprintf(stderr, "Bridge not enabled.\n");
+ return false;
+ }
+ }
+
+ std::fprintf(stderr, "The bridge is enabled!\n");
+
+ /* Read the configuration via blobs metadata (stat). */
+
+#if 0
+ /* Configure the mmio to point there. */
+ if (!io->IoWrite(bar | kAspeedP2aBridge, sizeof(phys), &phys)) {
+ // Failed to set it up, so fall back.
+ std::fprintf(stderr, "Failed to update the bridge address\n");
+ return false;
+ }
+#endif
return false;
}