PEL: Add a new error msg for FFDC collected after SBE chip-op success
SBE enqueues the FFDC (first failure data capture) corresponding
to the internal SBE operations and internal hardware procedure FFDC
After any SBE chip-op request from BMC, if the chip-op is
success BMC needs to check if any FFDC is present and needs
to create PEL based on the severity set in the FFDC packet.
There will be non-fatal errors when executing asynchronous
operations ( e.g auto-boot, MPIPL, DMT or any periodic
background operations in the SBE).
All accumulated non-fatal errors will be regularly reported back
in every chip-op response.
'''
root@rain71bmc:/tmp# peltool -l
{
"0x50006027": {
"SRC": "BD204503",
"Message": "SBE internal FFDC data after chipop request success",
"PLID": "0x50006027",
"CreatorID": "BMC",
"Subsystem": "Memory",
"Commit Time": "04/02/2024 12:42:14",
"Sev": "Unrecoverable Error",
"CompID": "bmc POZ PEL parser"
},
"0x50006028": {
"SRC": "BD204503",
"Message": "SBE internal FFDC data after chipop request success",
"PLID": "0x50006028",
"CreatorID": "BMC",
"Subsystem": "Memory",
"Commit Time": "04/02/2024 12:42:14",
"Sev": "Predictive Error",
"CompID": "bmc POZ PEL parser"
}
}
'''
Signed-off-by: Marri Devender Rao <devenrao@in.ibm.com>
Change-Id: Ib488eccfca3df8c68035c78b49661749d7d9889c
diff --git a/extensions/openpower-pels/registry/message_registry.json b/extensions/openpower-pels/registry/message_registry.json
index 3ad9736..0f89dab 100644
--- a/extensions/openpower-pels/registry/message_registry.json
+++ b/extensions/openpower-pels/registry/message_registry.json
@@ -1741,7 +1741,32 @@
]
}
},
+ {
+ "Name": "org.open_power.Processor.Error.SbeInternalFFDCData",
+ "Subsystem": "memory",
+ "ComponentID": "0x3500",
+ "SRC": {
+ "ReasonCode": "0x3505",
+ "Words6To9": {
+ "6": {
+ "Description": "[0:15] chip position, [16:23] command class, [24:31] command type",
+ "AdditionalDataPropSource": "SRC6"
+ }
+ }
+ },
+
+ "Documentation": {
+ "Description": "SBE internal FFDC data after SBE chipop success",
+ "Message": "SBE internal FFDC data after SBE chipop success",
+ "Notes": [
+ "The severity is set by the creator.",
+ "Callouts added based on OCMB SBE provided FFDC.",
+ "OCMB SBE provided additional debug data included as part of ",
+ "the additional user data section."
+ ]
+ }
+ },
{
"Name": "org.open_power.Attn.Error.Terminate",
"Subsystem": "cec_hardware",
@@ -6792,6 +6817,36 @@
"Check OCMB SBE Dump associated to this error to debug the failure."
]
}
+ },
+ {
+ "Name": "org.open_power.OCMB.Error.SbeInternalFFDCData",
+ "Subsystem": "memory",
+ "ComponentID": "0x4500",
+
+ "SRC": {
+ "ReasonCode": "0x4503",
+ "Words6To9": {
+ "6": {
+ "Description": "[0:15] chip position, [16:23] command class, [24:31] command type",
+ "AdditionalDataPropSource": "SRC6"
+ },
+ "7": {
+ "Description": "Chip Type",
+ "AdditionalDataPropSource": "CHIP_TYPE"
+ }
+ }
+ },
+
+ "Documentation": {
+ "Description": "SBE internal FFDC data after SBE chipop success",
+ "Message": "SBE internal FFDC data after SBE chipop success",
+ "Notes": [
+ "The severity is set by the creator.",
+ "Callouts added based on OCMB SBE provided FFDC.",
+ "OCMB SBE provided additional debug data included as part of ",
+ "the additional user data section."
+ ]
+ }
}
]
}