PEL: add new error messages for odyssey sbe related failures
There will be SBE instances for ocmb targets, so adding
error messages for any SBE access failures.
Adding the new attribute "CHIP_TYPE" as we now need to cater for
colletcing SBE FFDC data both for proc and ocmb.
Now added "chip type", to the libekb_get_sbe_ffdc method, which is
called in the sbe ffdc handler so that it can collect data for that
specified chip type.
Tested:
'''
"Private Header": {
"Created by": "0xF400",
},
"Primary SRC": {
"Section Version": "1",
"Sub-section type": "1",
"Created by": "0xF400",
"Error Details": {
"Message": "chipop request failure reported by OCMB SBE",
"SRC6": [
"0x4AA01",
"[0:15] chip position, [16:23] command class,
[24:31] command type"
],
"CHIP_TYPE": [
"0x28",
"Chip Type"
]
},
"Valid Word Count": "0x09",
"Reference Code": "BD20F401",
},
},
'''
Signed-off-by: Marri Devender Rao <devenrao@in.ibm.com>
Change-Id: I622b670d23fc1f6b0d62ad65a41ddcf89c65d319
diff --git a/extensions/openpower-pels/registry/O_component_ids.json b/extensions/openpower-pels/registry/O_component_ids.json
index 8e5cc42..5f1a6f6 100644
--- a/extensions/openpower-pels/registry/O_component_ids.json
+++ b/extensions/openpower-pels/registry/O_component_ids.json
@@ -18,5 +18,6 @@
"D100": "bmc hw diags attention handler",
"E500": "bmc hw diags",
"F100": "bmc faultlog",
- "F300": "bmc memory ECC errors"
+ "F300": "bmc memory ECC errors",
+ "F400": "bmc ocmb errors"
}
diff --git a/extensions/openpower-pels/registry/message_registry.json b/extensions/openpower-pels/registry/message_registry.json
index c2bb0b2..b20e6c4 100644
--- a/extensions/openpower-pels/registry/message_registry.json
+++ b/extensions/openpower-pels/registry/message_registry.json
@@ -6721,6 +6721,77 @@
"Description": "Uncorrectable ECC/other uncorrectable memory error.",
"Message": "Uncorrectable ECC/other uncorrectable memory error."
}
+ },
+
+ {
+ "Name": "org.open_power.OCMB.Error.SbeChipOpFailure",
+ "Subsystem": "memory",
+ "ComponentID": "0xF400",
+
+ "SRC": {
+ "ReasonCode": "0xF401",
+ "Words6To9": {
+ "6": {
+ "Description": "[0:15] chip position, [16:23] command class, [24:31] command type",
+ "AdditionalDataPropSource": "SRC6"
+ },
+ "7": {
+ "Description": "Chip Type",
+ "AdditionalDataPropSource": "CHIP_TYPE"
+ }
+ }
+ },
+
+ "Documentation": {
+ "Description": "chipop failure with OCMB SBE provided FFDC",
+ "Message": "chipop request failure reported by OCMB SBE",
+ "Notes": [
+ "The severity is set by the creator.",
+ "Callouts added based on OCMB SBE provided FFDC.",
+ "OCMB SBE provided additional debug data included as part of the",
+ "additional user data section."
+ ]
+ }
+ },
+
+ {
+ "Name": "org.open_power.OCMB.Error.SbeChipOpTimeout",
+ "Subsystem": "memory",
+ "ComponentID": "0xF400",
+
+ "SRC": {
+ "ReasonCode": "0xF402",
+ "Words6To9": {
+ "6": {
+ "Description": "[0:15] chip position, [16:23] command class, [24:31] command type",
+ "AdditionalDataPropSource": "SRC6"
+ },
+ "7": {
+ "Description": "Chip Type",
+ "AdditionalDataPropSource": "CHIP_TYPE"
+ }
+ }
+ },
+
+ "Callouts": [
+ {
+ "CalloutList": [
+ {
+ "Priority": "high",
+ "Procedure": "next_level_support"
+ }
+ ]
+ }
+ ],
+
+ "Documentation": {
+ "Description": "OCMB SBE chipop timeout",
+ "Message": "OCMB chipop timeout reported during SBE communication",
+ "Notes": [
+ "The severity is set by the creator.",
+ "Check OCMB SBE Dump associated to this error to debug the failure."
+ ]
+ }
}
]
}