PEL: Log spare clock failures as informational
This commit enables to log spare clock failure log as
informational.
For any sbe boot failures, application call pel api with
severity information. PEL process the SBE FFDC information
and servicable information. For the spare clock failure
there is request from RAS team to log error as informational.
Tested: forced clock error on primary processor after bmc
clock isteps.
"User Header": {
"Section Version": "1",
"Sub-section type": "0",
"Log Committed by": "0x2000",
"Subsystem": "Processor Chip Cache",
"Event Scope": "Entire Platform",
"Event Severity": "Informational Event",
"Event Type": "Miscellaneous, Informational Only",
"Action Flags": [
"Service Action Required",
"Report Externally",
"HMC Call Home"
],
"Host Transmission": "Not Sent",
"HMC Transmission": "Not Sent"
},
"Primary SRC": {
"Section Version": "1",
"Sub-section type": "1",
"Created by": "0x3500",
"SRC Version": "0x02",
"SRC Format": "0x55",
"Virtual Progress SRC": "False",
"I5/OS Service Event Bit": "False",
"Hypervisor Dump Initiated":"False",
"Backplane CCIN": "2E33",
"Terminate FW Error": "False",
"Deconfigured": "False",
"Guarded": "False",
"Error Details": {
"Message": "Boot failure reported by SBE",
"SRC6": [
"0x0",
"[0:15] chip position"
]
},
"Valid Word Count": "0x09",
"Reference Code": "BD123503",
"Hex Word 2": "00080055",
"Hex Word 3": "2E330010",
"Hex Word 4": "00000000",
"Hex Word 5": "00000000",
"Hex Word 6": "00000000",
"Hex Word 7": "00000000",
"Hex Word 8": "00000000",
"Hex Word 9": "00000000",
"Callout Section": {
"Callout Count": "1",
"Callouts": [{
"FRU Type": "Symbolic FRU",
"Priority": "Mandatory, replace all with
this type as a unit",
"Part Number": "REFCLK0"
}]
}
},
"User Data 3": {
"Section Version": "1",
"Sub-section type": "1",
"Created by": "0x2000",
"Data": [
{
"Deconfigured": true,
"EntityPath": [
35,
1,
0,
2,
0,
26,
1,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"Priority": "H",
"SymbolicFRU": "REFCLK0"
}
]
},
"User Data 4": {
"Section Version": "1",
"Sub-section type": "3",
"Created by": "0x2000",
"Data": [
"HWP_RC = RC_RCS_CLOCK_TEST_OUT_ERR",
"HWP_RC_DESC = xxxxxxx"
"HWP_FFDC_CLOCK_POS = 00",
"HWP_FFDC_READ_SNS1LTH = 00000000",
"HWP_FFDC_ATTR_CP_REFCLOCK_SELECT_VALUE = 02",
"HWP_FFDC_RCS_CLOCK_TEST_IN = 01",
"HWP_FFDC_CLOCK_A_OK = 00",
"HWP_FFDC_CLOCK_B_OK = 00",
"."
]
}
Signed-off-by: Jayanth Othayoth <ojayanth@in.ibm.com>
Change-Id: I15cdd76237d4cdf52e9e6dc907528a66218354c1
diff --git a/extensions/openpower-pels/pel.cpp b/extensions/openpower-pels/pel.cpp
index de70b53..898dce5 100644
--- a/extensions/openpower-pels/pel.cpp
+++ b/extensions/openpower-pels/pel.cpp
@@ -79,6 +79,12 @@
const auto& sbeFFDCFiles = sbeFFDCPtr->getSbeFFDC();
ffdcFiles.insert(ffdcFiles.end(), sbeFFDCFiles.begin(),
sbeFFDCFiles.end());
+
+ // update pel priority for spare clock failures
+ if (auto customSeverity = sbeFFDCPtr->getSeverity())
+ {
+ severity = customSeverity.value();
+ }
}
#endif