Add CPLD class for Mihawk platform
If PGOOD signal is abnormal when chassis power_on, read
Mihawk's CPLD-register via I2C to confirm the error.
First, confirm whether the power_on_error signal is 1
when chassis power_on(1 means abnormal).
If the signal is 1, read the error-code-register to
analysis reason.
Second, runtime to confirm whether the power_ready_error
signal is 1 after chassis power_on(1 means abnormal).
If the signal is 1, read the error-code-register to
analysis reason and shutdown the chassis.
Tested:
Use command "obmcutil chassiskill" to trigger PGOOD error
action analysis during chassis power on.
Signed-off-by: Andy YF Wang <Andy_YF_Wang@wistron.com>
Change-Id: I5f9c0d508627324a6c784ded125c28f0437bf52d
Signed-off-by: Alvin Wang <alvinwang@msn.com>
diff --git a/power-sequencer/runtime_monitor.cpp b/power-sequencer/runtime_monitor.cpp
index 9dd4550..f706655 100644
--- a/power-sequencer/runtime_monitor.cpp
+++ b/power-sequencer/runtime_monitor.cpp
@@ -33,7 +33,7 @@
int RuntimeMonitor::run()
{
-#ifdef UCD90160_DEVICE_ACCESS
+#ifdef DEVICE_ACCESS
return DeviceMonitor::run();
#else
return EXIT_SUCCESS;
@@ -48,7 +48,7 @@
{
timer.setEnabled(false);
-#ifdef UCD90160_DEVICE_ACCESS
+#ifdef DEVICE_ACCESS
device->onFailure();
#endif
// Note: This application only runs when the system has