pseq: Add config files for Fuji systems
Add phosphor-power-sequencer JSON configuration files for Fuji systems.
Add config files in both the old and new JSON formats. The old format
will be removed soon, but that has not occurred yet.
Tested:
* Tested in simulation environment
* Verified Fuji JSON files present in
/usr/share/phosphor-power-sequencer directory in firmware image
* Verified old format Fuji JSON file was found and loaded successfully
* Powered on chassis
* Verified powered on successfully and chassis pgood was true
* Verified no errors logged
* Verified phosphor-power-control did not write any errors to the
journal
* Powered off chassis
* Verified powered off successfully and chassis pgood was false
* Verified no errors logged
* Verified phosphor-power-control did not write any errors to the
journal
Change-Id: I739ca7d387af07fc0659d0e28ba366b01342a1b2
Signed-off-by: Shawn McCarney <shawnmm@us.ibm.com>
diff --git a/phosphor-power-sequencer/config_files/Fuji.json b/phosphor-power-sequencer/config_files/Fuji.json
new file mode 100644
index 0000000..0066730
--- /dev/null
+++ b/phosphor-power-sequencer/config_files/Fuji.json
@@ -0,0 +1,199 @@
+{
+ "rails": [
+ {
+ "name": "12.0V",
+ "page": 0,
+ "is_power_supply_rail": true,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3V3IO",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP03_AVDD",
+ "page": 18,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP12_AVDD",
+ "page": 19,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDN",
+ "page": 20,
+ "gpio": { "line": 72 }
+ },
+ {
+ "name": "CP1_VDN",
+ "page": 21,
+ "gpio": { "line": 73 }
+ },
+ {
+ "name": "CP2_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 22,
+ "gpio": { "line": 74 }
+ },
+ {
+ "name": "CP3_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 23,
+ "gpio": { "line": 75 }
+ },
+ {
+ "name": "CP0_VDD0",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD0",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 6,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDD1",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD1",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS0",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS0",
+ "page": 12,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 14,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 16,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS1",
+ "page": 11,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS1",
+ "page": 13,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 15,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 17,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VIO",
+ "page": 24,
+ "gpio": { "line": 76 }
+ },
+ {
+ "name": "CP1_VIO",
+ "page": 25,
+ "gpio": { "line": 77 }
+ },
+ {
+ "name": "CP2_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 26,
+ "gpio": { "line": 78 }
+ },
+ {
+ "name": "CP3_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 27,
+ "gpio": { "line": 79 }
+ },
+ {
+ "name": "CP0_VPCIE",
+ "page": 28,
+ "gpio": { "line": 59 }
+ },
+ {
+ "name": "CP1_VPCIE",
+ "page": 29,
+ "gpio": { "line": 60 }
+ },
+ {
+ "name": "CP2_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 30,
+ "gpio": { "line": 61 }
+ },
+ {
+ "name": "CP3_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 31,
+ "gpio": { "line": 62 }
+ }
+ ]
+}
diff --git a/phosphor-power-sequencer/config_files/UCD90320Monitor_ibm,fuji.json b/phosphor-power-sequencer/config_files/UCD90320Monitor_ibm,fuji.json
new file mode 100644
index 0000000..9b45ba8
--- /dev/null
+++ b/phosphor-power-sequencer/config_files/UCD90320Monitor_ibm,fuji.json
@@ -0,0 +1,100 @@
+{
+ "rails": [
+ { "name": "12.0V" },
+ { "name": "3V3IO" },
+ { "name": "CP0_VDD0" },
+ { "name": "CP0_VDD1" },
+ { "name": "CP1_VDD0" },
+ { "name": "CP1_VDD1" },
+ { "name": "CP2_VDD0" },
+ { "name": "CP2_VDD1" },
+ { "name": "CP3_VDD0" },
+ { "name": "CP3_VDD1" },
+ { "name": "CP0_VCS0" },
+ { "name": "CP0_VCS1" },
+ { "name": "CP1_VCS0" },
+ { "name": "CP1_VCS1" },
+ { "name": "CP2_VCS0" },
+ {
+ "name": "CP2_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0"
+ },
+ { "name": "CP3_VCS0" },
+ { "name": "CP3_VCS1" },
+ { "name": "CP03_AVDD" },
+ { "name": "CP12_AVDD" },
+ { "name": "CP0_VDN" },
+ { "name": "CP1_VDN" },
+ { "name": "CP2_VDN" },
+ { "name": "CP3_VDN" },
+ { "name": "CP0_VIO" },
+ { "name": "CP1_VIO" },
+ { "name": "CP2_VIO" },
+ { "name": "CP3_VIO" },
+ { "name": "CP0_VPCIE" },
+ { "name": "CP1_VPCIE" },
+ { "name": "CP2_VPCIE" },
+ { "name": "CP3_VPCIE" }
+ ],
+
+ "pins": [
+ {
+ "name": "CP0_VPCIE",
+ "line": 59
+ },
+ {
+ "name": "CP1_VPCIE",
+ "line": 60
+ },
+ {
+ "name": "CP2_VPCIE",
+ "line": 61,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0"
+ },
+ {
+ "name": "CP3_VPCIE",
+ "line": 62,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0"
+ },
+ {
+ "name": "5.0V_USB_front",
+ "line": 67
+ },
+ {
+ "name": "CP0_VDN",
+ "line": 72
+ },
+ {
+ "name": "CP1_VDN",
+ "line": 73
+ },
+ {
+ "name": "CP2_VDN",
+ "line": 74,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0"
+ },
+ {
+ "name": "CP3_VDN",
+ "line": 75,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0"
+ },
+ {
+ "name": "CP0_VIO",
+ "line": 76
+ },
+ {
+ "name": "CP1_VIO",
+ "line": 77
+ },
+ {
+ "name": "CP2_VIO",
+ "line": 78,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0"
+ },
+ {
+ "name": "CP3_VIO",
+ "line": 79,
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0"
+ }
+ ]
+}