pseq: Update config files to new format
Update the existing JSON configuration files for the
phosphor-power-sequencer application to the new JSON format. Add the new
"chassis" and "power_sequencer" elements.
Tested:
* Verified files were parsed successfully without errors by the
phosphor-power-sequencer application
Change-Id: Iec613eba738bb76be747e3429c4926e385380253
Signed-off-by: Shawn McCarney <shawnmm@us.ibm.com>
diff --git a/phosphor-power-sequencer/config_files/Balcones.json b/phosphor-power-sequencer/config_files/Balcones.json
index b74b572..4620c47 100644
--- a/phosphor-power-sequencer/config_files/Balcones.json
+++ b/phosphor-power-sequencer/config_files/Balcones.json
@@ -1,77 +1,94 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM Balcones systems"
+ ],
+ "chassis": [
{
- "name": "5.0VCS",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "12.0VA",
- "page": 0,
- "is_power_supply_rail": true,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "1.8V",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.9V",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3V",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "1.5V_AVDD",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.65V_VDN",
- "page": 6,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.7VA_VDD",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.7VB_VDD",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.75V_VCS",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.9V_VIO",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.85V_VPCIE",
- "page": 11,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90160",
+ "i2c_interface": { "bus": 2, "address": "0x64" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "5.0VCS",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "12.0VA",
+ "page": 0,
+ "is_power_supply_rail": true,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "1.8V",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.9V",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3V",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "1.5V_AVDD",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.65V_VDN",
+ "page": 6,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.7VA_VDD",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.7VB_VDD",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.75V_VCS",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.9V_VIO",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.85V_VPCIE",
+ "page": 11,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ }
+ ]
+ }
+ ]
}
]
}
diff --git a/phosphor-power-sequencer/config_files/BlueRidge.json b/phosphor-power-sequencer/config_files/BlueRidge.json
index 78a8c3b..7e0fd4e 100644
--- a/phosphor-power-sequencer/config_files/BlueRidge.json
+++ b/phosphor-power-sequencer/config_files/BlueRidge.json
@@ -1,113 +1,130 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM BlueRidge systems"
+ ],
+ "chassis": [
{
- "name": "12.0V",
- "page": 0,
- "is_power_supply_rail": true,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "5.0V_USB",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "5.0V_DASD",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3VA",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3VB",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDN_DCM0",
- "page": 24,
- "check_status_vout": true,
- "gpio": { "line": 72 }
- },
- {
- "name": "VDN_DCM1",
- "page": 25,
- "check_status_vout": true,
- "gpio": { "line": 73 }
- },
- {
- "name": "1.5V",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDA_DCM0",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDB_DCM0",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDA_DCM1",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDB_DCM1",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VCS_DCM0",
- "page": 26,
- "check_status_vout": true,
- "gpio": { "line": 74 }
- },
- {
- "name": "VCS_DCM1",
- "page": 27,
- "check_status_vout": true,
- "gpio": { "line": 75 }
- },
- {
- "name": "VIO_DCM0",
- "page": 28,
- "check_status_vout": true,
- "gpio": { "line": 76 }
- },
- {
- "name": "VIO_DCM1",
- "page": 29,
- "check_status_vout": true,
- "gpio": { "line": 77 }
- },
- {
- "name": "VPCIE_DCM0",
- "page": 30,
- "check_status_vout": true,
- "gpio": { "line": 78 }
- },
- {
- "name": "VPCIE_DCM1",
- "page": 31,
- "check_status_vout": true,
- "gpio": { "line": 79 }
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90320",
+ "i2c_interface": { "bus": 8, "address": "0x11" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "12.0V",
+ "page": 0,
+ "is_power_supply_rail": true,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "5.0V_USB",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "5.0V_DASD",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3VA",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3VB",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDN_DCM0",
+ "page": 24,
+ "check_status_vout": true,
+ "gpio": { "line": 72 }
+ },
+ {
+ "name": "VDN_DCM1",
+ "page": 25,
+ "check_status_vout": true,
+ "gpio": { "line": 73 }
+ },
+ {
+ "name": "1.5V",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDA_DCM0",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDB_DCM0",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDA_DCM1",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDB_DCM1",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VCS_DCM0",
+ "page": 26,
+ "check_status_vout": true,
+ "gpio": { "line": 74 }
+ },
+ {
+ "name": "VCS_DCM1",
+ "page": 27,
+ "check_status_vout": true,
+ "gpio": { "line": 75 }
+ },
+ {
+ "name": "VIO_DCM0",
+ "page": 28,
+ "check_status_vout": true,
+ "gpio": { "line": 76 }
+ },
+ {
+ "name": "VIO_DCM1",
+ "page": 29,
+ "check_status_vout": true,
+ "gpio": { "line": 77 }
+ },
+ {
+ "name": "VPCIE_DCM0",
+ "page": 30,
+ "check_status_vout": true,
+ "gpio": { "line": 78 }
+ },
+ {
+ "name": "VPCIE_DCM1",
+ "page": 31,
+ "check_status_vout": true,
+ "gpio": { "line": 79 }
+ }
+ ]
+ }
+ ]
}
]
}
diff --git a/phosphor-power-sequencer/config_files/Bonnell.json b/phosphor-power-sequencer/config_files/Bonnell.json
index 6ee1d3e..5370313 100644
--- a/phosphor-power-sequencer/config_files/Bonnell.json
+++ b/phosphor-power-sequencer/config_files/Bonnell.json
@@ -1,101 +1,118 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM Bonnell systems"
+ ],
+ "chassis": [
{
- "name": "5.0VCS",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "12.0VA",
- "page": 0,
- "is_power_supply_rail": true,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "1.8V",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.9V",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3V",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "1.5V_AVDD",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.65V_VDN",
- "page": 6,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.7VA_VDD",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.7VB_VDD",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.75V_VCS",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.9V_VIO",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "0.85V_VPCIE",
- "page": 11,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "PMIC2_PG",
- "page": 12,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "PMIC3_PG",
- "page": 13,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDR_1.2VB",
- "page": 14,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDR_1.2VA",
- "page": 15,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90160",
+ "i2c_interface": { "bus": 2, "address": "0x64" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "5.0VCS",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "12.0VA",
+ "page": 0,
+ "is_power_supply_rail": true,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "1.8V",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.9V",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3V",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "1.5V_AVDD",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.65V_VDN",
+ "page": 6,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.7VA_VDD",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.7VB_VDD",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.75V_VCS",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.9V_VIO",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "0.85V_VPCIE",
+ "page": 11,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "PMIC2_PG",
+ "page": 12,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "PMIC3_PG",
+ "page": 13,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDR_1.2VB",
+ "page": 14,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDR_1.2VA",
+ "page": 15,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ }
+ ]
+ }
+ ]
}
]
}
diff --git a/phosphor-power-sequencer/config_files/Everest.json b/phosphor-power-sequencer/config_files/Everest.json
index 8b0366c..646afa3 100644
--- a/phosphor-power-sequencer/config_files/Everest.json
+++ b/phosphor-power-sequencer/config_files/Everest.json
@@ -1,205 +1,222 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM Everest systems"
+ ],
+ "chassis": [
{
- "name": "12.0V",
- "page": 0,
- "is_power_supply_rail": true
- },
- {
- "name": "3V3IO",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP03_AVDD",
- "page": 18,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP12_AVDD",
- "page": 19,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VDN",
- "page": 20,
- "check_status_vout": true,
- "gpio": { "line": 72 }
- },
- {
- "name": "CP1_VDN",
- "page": 21,
- "check_status_vout": true,
- "gpio": { "line": 73 }
- },
- {
- "name": "CP2_VDN",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 22,
- "check_status_vout": true,
- "gpio": { "line": 74 }
- },
- {
- "name": "CP3_VDN",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 23,
- "check_status_vout": true,
- "gpio": { "line": 75 }
- },
- {
- "name": "CP0_VDD0",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VDD0",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VDD0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 6,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VDD0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VDD1",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VDD1",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VDD1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VDD1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VCS0",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VCS0",
- "page": 12,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VCS0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 14,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VCS0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 16,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VCS1",
- "page": 11,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VCS1",
- "page": 13,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VCS1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 15,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VCS1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 17,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VIO",
- "page": 24,
- "check_status_vout": true,
- "gpio": { "line": 76 }
- },
- {
- "name": "CP1_VIO",
- "page": 25,
- "check_status_vout": true,
- "gpio": { "line": 77 }
- },
- {
- "name": "CP2_VIO",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 26,
- "check_status_vout": true,
- "gpio": { "line": 78 }
- },
- {
- "name": "CP3_VIO",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 27,
- "check_status_vout": true,
- "gpio": { "line": 79 }
- },
- {
- "name": "CP0_VPCIE",
- "page": 28,
- "gpio": { "line": 59 }
- },
- {
- "name": "CP1_VPCIE",
- "page": 29,
- "gpio": { "line": 60 }
- },
- {
- "name": "CP2_VPCIE",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 30,
- "gpio": { "line": 61 }
- },
- {
- "name": "CP3_VPCIE",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 31,
- "gpio": { "line": 62 }
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90320",
+ "i2c_interface": { "bus": 8, "address": "0x11" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "12.0V",
+ "page": 0,
+ "is_power_supply_rail": true
+ },
+ {
+ "name": "3V3IO",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP03_AVDD",
+ "page": 18,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP12_AVDD",
+ "page": 19,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDN",
+ "page": 20,
+ "check_status_vout": true,
+ "gpio": { "line": 72 }
+ },
+ {
+ "name": "CP1_VDN",
+ "page": 21,
+ "check_status_vout": true,
+ "gpio": { "line": 73 }
+ },
+ {
+ "name": "CP2_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 22,
+ "check_status_vout": true,
+ "gpio": { "line": 74 }
+ },
+ {
+ "name": "CP3_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 23,
+ "check_status_vout": true,
+ "gpio": { "line": 75 }
+ },
+ {
+ "name": "CP0_VDD0",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD0",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 6,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDD1",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD1",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS0",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS0",
+ "page": 12,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 14,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 16,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS1",
+ "page": 11,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS1",
+ "page": 13,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 15,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 17,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VIO",
+ "page": 24,
+ "check_status_vout": true,
+ "gpio": { "line": 76 }
+ },
+ {
+ "name": "CP1_VIO",
+ "page": 25,
+ "check_status_vout": true,
+ "gpio": { "line": 77 }
+ },
+ {
+ "name": "CP2_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 26,
+ "check_status_vout": true,
+ "gpio": { "line": 78 }
+ },
+ {
+ "name": "CP3_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 27,
+ "check_status_vout": true,
+ "gpio": { "line": 79 }
+ },
+ {
+ "name": "CP0_VPCIE",
+ "page": 28,
+ "gpio": { "line": 59 }
+ },
+ {
+ "name": "CP1_VPCIE",
+ "page": 29,
+ "gpio": { "line": 60 }
+ },
+ {
+ "name": "CP2_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 30,
+ "gpio": { "line": 61 }
+ },
+ {
+ "name": "CP3_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 31,
+ "gpio": { "line": 62 }
+ }
+ ]
+ }
+ ]
}
]
}
diff --git a/phosphor-power-sequencer/config_files/Fuji.json b/phosphor-power-sequencer/config_files/Fuji.json
index 8b0366c..e68957f 100644
--- a/phosphor-power-sequencer/config_files/Fuji.json
+++ b/phosphor-power-sequencer/config_files/Fuji.json
@@ -1,205 +1,222 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM Fuji systems"
+ ],
+ "chassis": [
{
- "name": "12.0V",
- "page": 0,
- "is_power_supply_rail": true
- },
- {
- "name": "3V3IO",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP03_AVDD",
- "page": 18,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP12_AVDD",
- "page": 19,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VDN",
- "page": 20,
- "check_status_vout": true,
- "gpio": { "line": 72 }
- },
- {
- "name": "CP1_VDN",
- "page": 21,
- "check_status_vout": true,
- "gpio": { "line": 73 }
- },
- {
- "name": "CP2_VDN",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 22,
- "check_status_vout": true,
- "gpio": { "line": 74 }
- },
- {
- "name": "CP3_VDN",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 23,
- "check_status_vout": true,
- "gpio": { "line": 75 }
- },
- {
- "name": "CP0_VDD0",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VDD0",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VDD0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 6,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VDD0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VDD1",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VDD1",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VDD1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VDD1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VCS0",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VCS0",
- "page": 12,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VCS0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 14,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VCS0",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 16,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VCS1",
- "page": 11,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP1_VCS1",
- "page": 13,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP2_VCS1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 15,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP3_VCS1",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 17,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "CP0_VIO",
- "page": 24,
- "check_status_vout": true,
- "gpio": { "line": 76 }
- },
- {
- "name": "CP1_VIO",
- "page": 25,
- "check_status_vout": true,
- "gpio": { "line": 77 }
- },
- {
- "name": "CP2_VIO",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 26,
- "check_status_vout": true,
- "gpio": { "line": 78 }
- },
- {
- "name": "CP3_VIO",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 27,
- "check_status_vout": true,
- "gpio": { "line": 79 }
- },
- {
- "name": "CP0_VPCIE",
- "page": 28,
- "gpio": { "line": 59 }
- },
- {
- "name": "CP1_VPCIE",
- "page": 29,
- "gpio": { "line": 60 }
- },
- {
- "name": "CP2_VPCIE",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
- "page": 30,
- "gpio": { "line": 61 }
- },
- {
- "name": "CP3_VPCIE",
- "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
- "page": 31,
- "gpio": { "line": 62 }
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90320",
+ "i2c_interface": { "bus": 8, "address": "0x11" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "12.0V",
+ "page": 0,
+ "is_power_supply_rail": true
+ },
+ {
+ "name": "3V3IO",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP03_AVDD",
+ "page": 18,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP12_AVDD",
+ "page": 19,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDN",
+ "page": 20,
+ "check_status_vout": true,
+ "gpio": { "line": 72 }
+ },
+ {
+ "name": "CP1_VDN",
+ "page": 21,
+ "check_status_vout": true,
+ "gpio": { "line": 73 }
+ },
+ {
+ "name": "CP2_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 22,
+ "check_status_vout": true,
+ "gpio": { "line": 74 }
+ },
+ {
+ "name": "CP3_VDN",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 23,
+ "check_status_vout": true,
+ "gpio": { "line": 75 }
+ },
+ {
+ "name": "CP0_VDD0",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD0",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 6,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VDD1",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VDD1",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VDD1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS0",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS0",
+ "page": 12,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 14,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS0",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 16,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VCS1",
+ "page": 11,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP1_VCS1",
+ "page": 13,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP2_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 15,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP3_VCS1",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 17,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "CP0_VIO",
+ "page": 24,
+ "check_status_vout": true,
+ "gpio": { "line": 76 }
+ },
+ {
+ "name": "CP1_VIO",
+ "page": 25,
+ "check_status_vout": true,
+ "gpio": { "line": 77 }
+ },
+ {
+ "name": "CP2_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 26,
+ "check_status_vout": true,
+ "gpio": { "line": 78 }
+ },
+ {
+ "name": "CP3_VIO",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 27,
+ "check_status_vout": true,
+ "gpio": { "line": 79 }
+ },
+ {
+ "name": "CP0_VPCIE",
+ "page": 28,
+ "gpio": { "line": 59 }
+ },
+ {
+ "name": "CP1_VPCIE",
+ "page": 29,
+ "gpio": { "line": 60 }
+ },
+ {
+ "name": "CP2_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
+ "page": 30,
+ "gpio": { "line": 61 }
+ },
+ {
+ "name": "CP3_VPCIE",
+ "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
+ "page": 31,
+ "gpio": { "line": 62 }
+ }
+ ]
+ }
+ ]
}
]
}
diff --git a/phosphor-power-sequencer/config_files/Rainier.json b/phosphor-power-sequencer/config_files/Rainier.json
index 78a8c3b..8095df4 100644
--- a/phosphor-power-sequencer/config_files/Rainier.json
+++ b/phosphor-power-sequencer/config_files/Rainier.json
@@ -1,113 +1,130 @@
{
- "rails": [
+ "comments": [
+ "phosphor-power-sequencer configuration file for IBM Rainier systems"
+ ],
+ "chassis": [
{
- "name": "12.0V",
- "page": 0,
- "is_power_supply_rail": true,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "5.0V_USB",
- "page": 1,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "5.0V_DASD",
- "page": 2,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3VA",
- "page": 3,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "3.3VB",
- "page": 4,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDN_DCM0",
- "page": 24,
- "check_status_vout": true,
- "gpio": { "line": 72 }
- },
- {
- "name": "VDN_DCM1",
- "page": 25,
- "check_status_vout": true,
- "gpio": { "line": 73 }
- },
- {
- "name": "1.5V",
- "page": 5,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDA_DCM0",
- "page": 7,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDB_DCM0",
- "page": 8,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDA_DCM1",
- "page": 9,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VDDB_DCM1",
- "page": 10,
- "check_status_vout": true,
- "compare_voltage_to_limit": true
- },
- {
- "name": "VCS_DCM0",
- "page": 26,
- "check_status_vout": true,
- "gpio": { "line": 74 }
- },
- {
- "name": "VCS_DCM1",
- "page": 27,
- "check_status_vout": true,
- "gpio": { "line": 75 }
- },
- {
- "name": "VIO_DCM0",
- "page": 28,
- "check_status_vout": true,
- "gpio": { "line": 76 }
- },
- {
- "name": "VIO_DCM1",
- "page": 29,
- "check_status_vout": true,
- "gpio": { "line": 77 }
- },
- {
- "name": "VPCIE_DCM0",
- "page": 30,
- "check_status_vout": true,
- "gpio": { "line": 78 }
- },
- {
- "name": "VPCIE_DCM1",
- "page": 31,
- "check_status_vout": true,
- "gpio": { "line": 79 }
+ "number": 1,
+ "inventory_path": "/xyz/openbmc_project/inventory/system/chassis",
+ "power_sequencers": [
+ {
+ "type": "UCD90320",
+ "i2c_interface": { "bus": 8, "address": "0x11" },
+ "power_control_gpio_name": "power-chassis-control",
+ "power_good_gpio_name": "power-chassis-good",
+ "rails": [
+ {
+ "name": "12.0V",
+ "page": 0,
+ "is_power_supply_rail": true,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "5.0V_USB",
+ "page": 1,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "5.0V_DASD",
+ "page": 2,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3VA",
+ "page": 3,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "3.3VB",
+ "page": 4,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDN_DCM0",
+ "page": 24,
+ "check_status_vout": true,
+ "gpio": { "line": 72 }
+ },
+ {
+ "name": "VDN_DCM1",
+ "page": 25,
+ "check_status_vout": true,
+ "gpio": { "line": 73 }
+ },
+ {
+ "name": "1.5V",
+ "page": 5,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDA_DCM0",
+ "page": 7,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDB_DCM0",
+ "page": 8,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDA_DCM1",
+ "page": 9,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VDDB_DCM1",
+ "page": 10,
+ "check_status_vout": true,
+ "compare_voltage_to_limit": true
+ },
+ {
+ "name": "VCS_DCM0",
+ "page": 26,
+ "check_status_vout": true,
+ "gpio": { "line": 74 }
+ },
+ {
+ "name": "VCS_DCM1",
+ "page": 27,
+ "check_status_vout": true,
+ "gpio": { "line": 75 }
+ },
+ {
+ "name": "VIO_DCM0",
+ "page": 28,
+ "check_status_vout": true,
+ "gpio": { "line": 76 }
+ },
+ {
+ "name": "VIO_DCM1",
+ "page": 29,
+ "check_status_vout": true,
+ "gpio": { "line": 77 }
+ },
+ {
+ "name": "VPCIE_DCM0",
+ "page": 30,
+ "check_status_vout": true,
+ "gpio": { "line": 78 }
+ },
+ {
+ "name": "VPCIE_DCM1",
+ "page": 31,
+ "check_status_vout": true,
+ "gpio": { "line": 79 }
+ }
+ ]
+ }
+ ]
}
]
}