Fix the issue of clearRegister function

Modify the clearCPLDregister() mechanism to avoid clearing the
register record when the power error event still exists.
Before clearing the record, add conditions to determine whether
the psu pgood status is normal. (mihawk have two psus)

Change-Id: I28d353c13329145128b2633f134b01b7b3515038
Signed-off-by: Andy YF Wang <Andy_YF_Wang@wistron.com>
diff --git a/power-sequencer/mihawk-cpld.cpp b/power-sequencer/mihawk-cpld.cpp
index 3a65a66..0e0744a 100644
--- a/power-sequencer/mihawk-cpld.cpp
+++ b/power-sequencer/mihawk-cpld.cpp
@@ -26,6 +26,9 @@
 static constexpr uint8_t busId = 11;
 static constexpr uint8_t slaveAddr = 0x40;
 
+// SMLink Status Register(PSU status Register)
+static constexpr size_t StatusReg_0 = 0x05;
+
 // SMLink Status Register(Interrupt-control-bit Register)
 static constexpr size_t StatusReg_1 = 0x20;
 
@@ -369,8 +372,8 @@
                         errorcodeMask = 1;
                         break;
                 }
-                clearCPLDregister();
             }
+            clearCPLDregister();
         }
     }
 
@@ -475,15 +478,24 @@
 void MihawkCPLD::clearCPLDregister()
 {
     uint16_t data = 0x01;
+    uint16_t checkpsu;
 
     if (!i2c)
     {
         openCPLDDevice();
     }
 
-    // Write 0x01 to StatusReg_1 for clearing
-    // CPLD_register.
-    i2c->write(StatusReg_1, data);
+    // check psu pgood status.
+    i2c->read(StatusReg_0, checkpsu);
+
+    // check one of both psus pgood status before
+    // clear CPLD_register.
+    if (((checkpsu >> 1) & 1) || ((checkpsu >> 2) & 1))
+    {
+        // Write 0x01 to StatusReg_1 for clearing
+        // CPLD_register.
+        i2c->write(StatusReg_1, data);
+    }
 }
 
 // Open i2c device(CPLD_register)