commit 0475f65f5feb9381ef2710dca96b545546ccd944
author Yi Li <adamliyi@msn.com> Tue Oct 25 13:19:59 2016 +0800
committer Patrick Williams <patrick@stwcx.xyz> Fri Nov 18 15:01:54 2016 +0000
tree 87b47b5740441be769d0e4ae0f487c4d6b259991
parent dfda936510a56421370267ef5fc54b10b739c67c

op-pwrctl: Hold PCI resets until BootProgress passes BASE_INITIALIZATION state

When powering on host, hold PCI resets until hostboot passes stage
"BASE_INITIALIZATION"(0x14).

This fix applies to Firestone and Garrison.

Partially resolves openbmc/openbmc#315

Change-Id: Ic71c81406ac188b34df89569e2264ea0b94406f3
Signed-off-by: Yi Li <adamliyi@msn.com>

configs/Barreleye.py

diff --git a/configs/Barreleye.py b/configs/Barreleye.py
index 8e7af2c..e8e8d57 100644
--- a/configs/Barreleye.py
+++ b/configs/Barreleye.py
@@ -558,14 +558,17 @@
 }
 
 POWER_CONFIG = {
-    'power_good_in' : 'PGOOD',
-    'power_up_outs' : [
+    'power_good_in': 'PGOOD',
+    'power_up_outs': [
         ('POWER_PIN', False),
     ],
-    'reset_outs' : [
-        ('PCIE_RESET', False),
+    'reset_outs': [
         ('USB_RESET', False),
     ],
+    'pci_reset_outs': [
+        # net name, polarity, reset hold
+        ('PCIE_RESET', False, False),
+    ],
 }
 
 # Miscellaneous non-poll sensor with system specific properties.

configs/Firestone.py

diff --git a/configs/Firestone.py b/configs/Firestone.py
index 0b7eb17..285c397 100644
--- a/configs/Firestone.py
+++ b/configs/Firestone.py
@@ -460,9 +460,13 @@
         ('CM1_OE_R_N', True),
         ('BMC_CP0_RESET_N', False),
         ('BMC_CFAM_RESET_N_R', False),
-        ('PEX8718_DEVICES_RESET_N', False),
-        ('CP0_DEVICES_RESET_N', False),
-        ('CP1_DEVICES_RESET_N', False),
+    ],
+    'pci_reset_outs' : [
+        # net name, polarity, reset hold
+        # if 'reset hold' set to 'True', BMC will hold pci reset until host CPU ready to drive PCI
+        ('PEX8718_DEVICES_RESET_N', False, True),
+        ('CP0_DEVICES_RESET_N', False, True),
+        ('CP1_DEVICES_RESET_N', False, True),
     ],
 }
 

configs/Garrison.py

diff --git a/configs/Garrison.py b/configs/Garrison.py
index 8d29750..aef0720 100644
--- a/configs/Garrison.py
+++ b/configs/Garrison.py
@@ -461,9 +461,13 @@
         ('CM1_OE_R_N', True),
         ('BMC_CP0_RESET_N', False),
         ('BMC_CFAM_RESET_N_R', False),
-        ('PEX8718_DEVICES_RESET_N', False),
-        ('CP0_DEVICES_RESET_N', False),
-        ('CP1_DEVICES_RESET_N', False),
+    ],
+    'pci_reset_outs' : [
+        # net name, polarity, reset hold
+        # if 'reset hold' set to 'True', BMC will hold pci reset until host CPU ready to drive PCI
+        ('PEX8718_DEVICES_RESET_N', False, True),
+        ('CP0_DEVICES_RESET_N', False, True),
+        ('CP1_DEVICES_RESET_N', False, True),
     ],
 }
 

configs/Palmetto.py

diff --git a/configs/Palmetto.py b/configs/Palmetto.py
index 19037a1..7ed578c 100644
--- a/configs/Palmetto.py
+++ b/configs/Palmetto.py
@@ -131,14 +131,17 @@
 }
 
 POWER_CONFIG = {
-    'power_good_in' : 'PGOOD',
-    'power_up_outs' : [
+    'power_good_in': 'PGOOD',
+    'power_up_outs': [
         ('POWER_PIN', False),
     ],
-    'reset_outs' : [
-        ('PCIE_RESET', False),
+    'reset_outs': [
         ('USB_RESET', False),
     ],
+    'pci_reset_outs': [
+        # net name, polarity, reset hold
+        ('PCIE_RESET', False, False),
+    ],
 }
 
 # Miscellaneous non-poll sensor with system specific properties.

configs/Witherspoon.py

diff --git a/configs/Witherspoon.py b/configs/Witherspoon.py
index 27fc88f..3250fb2 100644
--- a/configs/Witherspoon.py
+++ b/configs/Witherspoon.py
@@ -479,11 +479,11 @@
 
 
 POWER_CONFIG = {
-    'power_good_in' : 'SYS_PWROK_BUFF',
-    'power_up_outs' : [
+    'power_good_in': 'SYS_PWROK_BUFF',
+    'power_up_outs': [
         ('BMC_POWER_UP', True),
     ],
-    'reset_outs' : [
+    'reset_outs': [
     ],
 }
 

configs/Zaius.py

diff --git a/configs/Zaius.py b/configs/Zaius.py
index bb70846..2160e69 100644
--- a/configs/Zaius.py
+++ b/configs/Zaius.py
@@ -393,13 +393,13 @@
 }
 
 POWER_CONFIG = {
-    'latch_out' : 'BMC_UCD_LATCH_LE',
-    'power_good_in' : 'SYS_PWROK_BUFF',
-    'power_up_outs' : [
+    'latch_out': 'BMC_UCD_LATCH_LE',
+    'power_good_in': 'SYS_PWROK_BUFF',
+    'power_up_outs': [
         ('SOFTWARE_PGOOD', True),
         ('BMC_POWER_UP', True),
     ],
-    'reset_outs' : [
+    'reset_outs': [
     ],
 }