pwrctl: Add latch output to power control

On the Zaius machine, the BMC signals that power up the CPU are gated by
a latch to protect against GPIO blips during BMC reset/power loss.

This adds an optional power GPIO configuration that controls the latch's
enable pin. Its behavior is to assert high when the op-pwrctl runs,
allowing power_up lines to propagate past their latches.

Signed-off-by: Xo Wang <xow@google.com>
Change-Id: Ibf0d1db771033cb9bba82575cca1bd21cfb3ad3d
4 files changed