pwrctl: Add latch output to power control
On the Zaius machine, the BMC signals that power up the CPU are gated by
a latch to protect against GPIO blips during BMC reset/power loss.
This adds an optional power GPIO configuration that controls the latch's
enable pin. Its behavior is to assert high when the op-pwrctl runs,
allowing power_up lines to propagate past their latches.
Signed-off-by: Xo Wang <xow@google.com>
Change-Id: Ibf0d1db771033cb9bba82575cca1bd21cfb3ad3d
diff --git a/pysystemmgr/system_manager.py b/pysystemmgr/system_manager.py
index 5ecc14f..6f4bf81 100644
--- a/pysystemmgr/system_manager.py
+++ b/pysystemmgr/system_manager.py
@@ -180,12 +180,13 @@
return r
@dbus.service.method(DBUS_NAME, in_signature='',
- out_signature='sa(sb)a(sb)')
+ out_signature='ssa(sb)a(sb)')
def getPowerConfiguration(self):
power_good_in = System.POWER_CONFIG.get('power_good_in', '')
+ latch_out = System.POWER_CONFIG.get('latch_out', '')
power_up_outs = System.POWER_CONFIG.get('power_up_outs', [])
reset_outs = System.POWER_CONFIG.get('reset_outs', [])
- r = [power_good_in, power_up_outs, reset_outs]
+ r = [power_good_in, latch_out, power_up_outs, reset_outs]
print "Power GPIO config: " + str(r)
return r