tree 196aec25a5a1e53368f96cbd3f0c990a99ddd5af
parent 20a194169c527fbded95749acd29ef44dfbe70c7
author Xo Wang <xow@google.com> 1474587277 -0700
committer Patrick Williams <patrick@stwcx.xyz> 1475550113 +0000

pwrctl: Add latch output to power control

On the Zaius machine, the BMC signals that power up the CPU are gated by
a latch to protect against GPIO blips during BMC reset/power loss.

This adds an optional power GPIO configuration that controls the latch's
enable pin. Its behavior is to assert high when the op-pwrctl runs,
allowing power_up lines to propagate past their latches.

Signed-off-by: Xo Wang <xow@google.com>
Change-Id: Ibf0d1db771033cb9bba82575cca1bd21cfb3ad3d