cpuinfoapp: Add SST discovery feature
Retrieve Intel Speed Select Technology (SST) configuration values for
all CPUs via PECI (OS-PCode mailbox). Each CPU may have up to three
Performance Profiles (PP), each with accompanying Base Frequency (BF)
information.
Discovery is started immediately, but if no CPUs are found or any
unexpected PECI error is encountered, discovery is aborted and scheduled
for periodic retries until complete.
The profile data is published on D-Bus using two predefined interfaces:
- xyz.openbmc_project.Control.Processor.CurrentOperationConfig, which
is implemented on each "cpu" object in the inventory, and contains
mutable properties for OOB configuration (modifiying properties not
supported yet).
- xyz.openbmc_project.Inventory.Item.Cpu.OperationConfig, which is
implemented on separate "config" objects and contains the readonly
properties for each performance profile.
Tested:
- Profiled performance of PECI operations via code instrumentation
(takes ~2 min per CPU on ast2500 during BMC boot, ~2 sec during BMC idle).
- Validated Redfish output against Linux driver using included python
tool.
- Injected PECI failures in code to test error handling, and tested
with Linux OS idling on host to make sure WOP is working.
Change-Id: I0d8ae79655dfd2880cf3bae6abe600597740df7c
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
7 files changed