commit ca2b38a60bf1c2bd4819f275625809dc79471523
author Jonathan Doman <jonathan.doman@intel.com> Mon May 08 18:21:07 2023 -0700
committer Jonathan Doman <jonathan.doman@intel.com> Mon May 08 18:21:07 2023 -0700
tree 772c9ba3828c8e34bba3f1fdc27ea9f09cfcf294
parent defbc2acdbdf7827706ddd7fee53d193b3d849b3

Add GNR and SRF to cpuinfoapp support

They do support same PCS and PIROM interfaces as previous generations.

Change-Id: Ib30df04dff9cd9506a193589234f1d52c76a022a
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

src/cpuinfo_main.cpp

diff --git a/src/cpuinfo_main.cpp b/src/cpuinfo_main.cpp
index eac04d5..85a2302 100644
--- a/src/cpuinfo_main.cpp
+++ b/src/cpuinfo_main.cpp
@@ -408,6 +408,8 @@
         case icxd:
         case spr:
         case emr:
+        case gnr:
+        case srf:
         {
             // PPIN can be read through PCS 19
             static constexpr uint8_t u8Size = 4; // default to a DWORD