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gerrit.openbmc.org / openbmc / x86-power-control / 8d6602196d496a8611a789cd36036b2f4ea14f76
commit8d6602196d496a8611a789cd36036b2f4ea14f76[log] [tgz]
authorYong Li <yong.b.li@linux.intel.com>Fri Dec 27 10:18:10 2019 +0800
committerYong Li <yong.b.li@linux.intel.com>Fri Jan 03 10:26:40 2020 +0800
tree7027a6000873739d3f874bf1de77fb7548a881d8
parent3f6ecb212494d1a9362256d7aae03e11f3efb6f7 [diff]
Log the Host DC On/Off redfish messages when the host state is changed

In order to skip the redfish DC On/Off messages during the
initialization process, move the log action from sel-logger.

Tested:
Reboot BMC, and check the redfish log, there is no DCPowerOn/Off log;
Chassis power on/off, the DCPowerOn/Off log is correct

Change-Id: I2af37940540d768f0882bf038bb0908ebb6352c4
Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
1 file changed
tree: 7027a6000873739d3f874bf1de77fb7548a881d8
  1. cmake/
  2. i2c/
  3. power-control-x86/
  4. .clang-format
  5. CMakeLists.txt
  6. LICENSE
  7. MAINTAINERS
  8. README.md
README.md

X86 power control

This repository contains an OpenBMC compliant implementation of power control for x86 servers. It relies on a number of features to do its job. It has several intentional design goals.

  1. The BMC should maintain the Host state machine internally, and be able to track state changes.
  2. The implementation should either give the requested power control result, or should log an error on the failure it detected.
  3. The BMC should support all the common operations, hard power on/off/cycle, soft power on/off/cycle.

At this point in time, this daemon targets Lewisburg based, dual socket x86 server platforms, such as S2600WFT. It is likely that other platforms will work as well.

Because this relies on the hardware passthrough support in the AST2500 to function, it requires a few patches to work correctly.

This patch adds support to UBOOT to keep the passthrough enabled https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/ recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch

The DTS file for your platform will need the following GPIO definitions RESET_BUTTON RESET_OUT POWER_BUTTON POWER_OUT

On an aspeed, these are generally connected to E0, E1, E2, and E3 respecitvely. An example of this is available in the s2600WF config.

This patch allows the passthrough to be reenabled to the default condition when the appropriate pin is released. This allows power control to take control when needed by a user power action, but leave the hardware in control a majority of the time, reducing the possibilty of bricking a system due to a failed BMC.

https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0006-Allow-monitoring-of-power-control-input-GPIOs.patch

Caveats: This implementation does not currently implement the common targets that other implementations do. There were several attempts to, but all ended in timing issues and boot inconsistencies during stress operations.