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gerrit.openbmc.org / openbmc / x86-power-control / 8f5cb6a496edfe0b92f91fdeddb7f7f62aa0bae1
commit8f5cb6a496edfe0b92f91fdeddb7f7f62aa0bae1[log] [tgz]
authorAppaRao Puli <apparao.puli@linux.intel.com>Tue Jan 14 02:47:29 2020 +0530
committerAppaRao Puli <apparao.puli@linux.intel.com>Tue Jan 14 02:47:29 2020 +0530
treeae8a15b800587fd99c723650c8e99bf5993d05e5
parent344dae8847867d3fd6de6c29a22543af9558504f [diff]
Update OSState when system is off

When power state is changed to Off, POST_COMPLETE GPIO event
is not working in some platforms. This is causing the OSState
set to Standby even though system is OFF. Due to this behavior
false threshold events are logged for SSB Temp sensor.

Check HostState for Off and updating 'OperatingSystemState'
to 'Inactive'.

Tested:
Performed power actions like on, off, reset, soft etc..
and observed no false threshold events.

Change-Id: I237974e0ae577a904424504b23387fc34751ddaa
Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
1 file changed
tree: ae8a15b800587fd99c723650c8e99bf5993d05e5
  1. cmake/
  2. i2c/
  3. power-control-x86/
  4. .clang-format
  5. CMakeLists.txt
  6. LICENSE
  7. MAINTAINERS
  8. README.md
README.md

X86 power control

This repository contains an OpenBMC compliant implementation of power control for x86 servers. It relies on a number of features to do its job. It has several intentional design goals.

  1. The BMC should maintain the Host state machine internally, and be able to track state changes.
  2. The implementation should either give the requested power control result, or should log an error on the failure it detected.
  3. The BMC should support all the common operations, hard power on/off/cycle, soft power on/off/cycle.

At this point in time, this daemon targets Lewisburg based, dual socket x86 server platforms, such as S2600WFT. It is likely that other platforms will work as well.

Because this relies on the hardware passthrough support in the AST2500 to function, it requires a few patches to work correctly.

This patch adds support to UBOOT to keep the passthrough enabled https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/ recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch

The DTS file for your platform will need the following GPIO definitions RESET_BUTTON RESET_OUT POWER_BUTTON POWER_OUT

On an aspeed, these are generally connected to E0, E1, E2, and E3 respecitvely. An example of this is available in the s2600WF config.

This patch allows the passthrough to be reenabled to the default condition when the appropriate pin is released. This allows power control to take control when needed by a user power action, but leave the hardware in control a majority of the time, reducing the possibilty of bricking a system due to a failed BMC.

https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0006-Allow-monitoring-of-power-control-input-GPIOs.patch

Caveats: This implementation does not currently implement the common targets that other implementations do. There were several attempts to, but all ended in timing issues and boot inconsistencies during stress operations.