commit | e9a9e2d708da97037aba0e37ebf19feae895b8f1 | [log] [tgz] |
---|---|---|
author | Jason M. Bills <jason.m.bills@linux.intel.com> | Thu Aug 08 14:01:19 2019 -0700 |
committer | Jason Bills <jason.m.bills@linux.intel.com> | Mon Nov 25 19:31:26 2019 +0000 |
tree | 208644e2b04aab208e2edf5b3c0bec6632719451 | |
parent | 33a532dbb0af04f7776edfc2069f70b4d6695489 [diff] |
Use Host Off state for warm reset notification This change adds detection and handling for warm reset in the power control state machine, and makes the warm reset check as well as the transition to off states set the Host State to Off. This allows anyone monitoring the Host State to be notified when the host has stopped running due to a reset or shutdown. Tested: From UEFI shell ran reset -w (warm reset) Confirmed that the warm reset was detected and the system returned to the On state. reset -c (cold reset) Confirmed that a warm reset was not detected and the system returned to the On state. reset -s (shutdown) Confirmed that a warm reset was not detected and the system moved to the Off state. Also pressed the reset button to confirm that the IPMI restart cause is correctly updated for warm reset vs. reset button. Change-Id: Ie2757ac808439c59f901d1eef5ddc5a28ef492ec Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
This repository contains an OpenBMC compliant implementation of power control for x86 servers. It relies on a number of features to do its job. It has several intentional design goals.
At this point in time, this daemon targets Lewisburg based, dual socket x86 server platforms, such as S2600WFT. It is likely that other platforms will work as well.
Because this relies on the hardware passthrough support in the AST2500 to function, it requires a few patches to work correctly.
This patch adds support to UBOOT to keep the passthrough enabled https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/ recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch
The DTS file for your platform will need the following GPIO definitions RESET_BUTTON RESET_OUT POWER_BUTTON POWER_OUT
On an aspeed, these are generally connected to E0, E1, E2, and E3 respecitvely. An example of this is available in the s2600WF config.
This patch allows the passthrough to be reenabled to the default condition when the appropriate pin is released. This allows power control to take control when needed by a user power action, but leave the hardware in control a majority of the time, reducing the possibilty of bricking a system due to a failed BMC.
https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0006-Allow-monitoring-of-power-control-input-GPIOs.patch
Caveats: This implementation does not currently implement the common targets that other implementations do. There were several attempts to, but all ended in timing issues and boot inconsistencies during stress operations.