tree eaace98a8d8b1c51119da6050f9caf660c3255ae
parent 2c714052d62b1e8fdd19951bbd340ec41fd7ac5b
author Ed Tanous <ed.tanous@intel.com> 1565906945 -0700
committer Ed Tanous <ed.tanous@intel.com> 1569521798 +0000

Reinvent x86 power control application

The previous application that was posted here had a TON of timing
issues that made it basically unworkable, and was missing several
features (like power button override, VR timers, ect) that weren't
really possible in the old scheme.

This commit shows a reimagining of power control on the AST2500, and
seems to work much more reliably in testing across several platforms.

The key differentiators here are:
1. It gets rid of the target files.  Despite _many_ attempts to make the
target file approach reliable across 1000/10000 reboot cycle testings,
it was clear that the timing differences in the activation times caused
too many hard to fix race conditions.  To this end, the power state
machine has been moved into c++, where we can be very explicit about our
IO, and event timings.
2. It implements several features that were not present in the old
implementation, like soft power cycle.  These were required to implement
the full Redfish ComputerSystem schema properly.
3. It implements proper handling when collisions occur.  For example
when two power off requests come in at the same time.  Because of #1 we
can now service both of these requests "correctly" and remove the
possibility of desyncronizing the state machine from the host state.

A majority of this work was accomplished by Jason Bills.  The history is
available here, which can be pushed if needed, but I don't beleive it's
wanted.

https://github.com/Intel-BMC/intel-chassis-control/commits/master

Signed-off-by: Ed Tanous <ed.tanous@intel.com>
Change-Id: I2eb7fb1dbcab3d374df9d2e8c62407f0277e2583