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gerrit.openbmc.org / openbmc / x86-power-control / 8643c79740d21f4a21184de729c19f9aec0f7c48
commit8643c79740d21f4a21184de729c19f9aec0f7c48[log] [tgz]
authorPing Guo <guoping@inspur.com>Wed May 18 08:32:00 2022 +0800
committerJohn Wang <wangzhiqiang02@inspur.com>Fri Sep 16 00:29:59 2022 +0000
treeff6929215368f969199d593b8a1a0c596c11099d
parent9dbcee8522674d42e75687cb9916c1b25bd875c3 [diff]
Set NMI_OUT according to the configuration file

Configuration file supports setting the polarity of the nmi_out pin so
we don't have to hardcode the polarity

Tested:

On a machine, without this change, nmi_out always triggers and causes
the host to crash

With this change, the host no longer crashes after the polarity of the
nmi out pin is configured correctly

Change-Id: I34049136c0ede117eec50b5ce47698f1b319624c
Signed-off-by: John Wang <wangzhiqiang02@inspur.com>
1 file changed
tree: ff6929215368f969199d593b8a1a0c596c11099d
  1. config/
  2. service_files/
  3. src/
  4. subprojects/
  5. .clang-format
  6. .gitignore
  7. LICENSE
  8. meson.build
  9. meson_options.txt
  10. OWNERS
  11. README.md
README.md

X86 power control

This repository contains an OpenBMC compliant implementation of power control for x86 servers. It relies on a number of features to do its job. It has several intentional design goals.

  1. The BMC should maintain the Host state machine internally, and be able to track state changes.
  2. The implementation should either give the requested power control result, or should log an error on the failure it detected.
  3. The BMC should support all the common operations, hard power on/off/cycle, soft power on/off/cycle.

This daemon has been successfully used on a variety of server platforms; it should be able to support platforms with power control GPIOs similar to those in its config file.

x86-power-control uses default json file (power-config-host0.json) for GPIO configuration. However this can be customized by producing your own power-config-host0.json file.

Definitions can be configured by two type:

  1. GPIO

For the platform having direct GPIO access can use the type GPIO and define like below.

{
    "Name" : "PostComplete",
    "LineName" : "POST_COMPLETE",
    "Type" : "GPIO"
},
  1. DBUS

For the platform not having direct GPIO access can use dbus based event monitor by using the type DBUS.

{
    "Name" : "PowerButton",
    "DbusName" : "xyz.openbmc_project.Chassis.Event",
    "Path" : "/xyz/openbmc_project/Chassis/Event",
    "Interface" : "xyz.openbmc_project.Chassis.Event",
    "Property" : "PowerButton_Host1",
    "Type" : "DBUS"
},

x86-power-control will monitor the property change from the given DbusName and take appropriate action. *define Property as a bool variable.

Caveats: This implementation does not currently implement the common targets that other implementations do. There were several attempts to, but all ended in timing issues and boot inconsistencies during stress operations.

Build Options

chassis-system-reset

Enable chassis system power reset to allow removing power and restoring back.

use-plt-rst

The POST Complete GPIO is usually held asserted by BIOS after POST complete and de-asserts on reset. This de-assert behavior is currently used to detect warm resets.

Some systems are adding support for a PLT_RST eSPI signal that can be used to more accurately detect warm resets. When this option is enabled, x86-power-control will use PLT_RST to detect warm resets instead of POST Complete.

See https://github.com/Intel-BMC/host-misc-comm-manager for implementation example.