tree 014b9c80295661ed5a75ae058cf1afb4c5ecb2bd
parent c480866ab6352527cd944e47fdec987922e99327
author Vasant Hegde <hegdevasant@linux.vnet.ibm.com> 1631253621 +0000
committer Vasant Hegde <hegdevasant@linux.vnet.ibm.com> 1631253621 +0000

skiboot v6.8-115-g7744e8ac4

Alistair Popple (2):
      hw/phys-map/p10: Add P10 MMIO map
      platforms: Add Rainier

Anju T Sudhakar (1):
      hw/imc: Power10 support

Cédric Le Goater (22):
      plat/qemu/p10: add a POWER10 platform
      psi/p10: Activate P10 interrupts
      xive/p10: Add a XIVE2 driver
      psi/p10: Activate 64K ESB pages
      psi/p10: Activate StoreEOI
      xive/p10: Add option flags to the XIVE exploitation mode
      hw/phb5: Add support for PQ offloading
      hw/phb5: Add support for 'Address-Based Interrupt Trigger' mode
      psi/p10: Introduce xive2_source_mask()
      psi/p10: Mask all sources at init
      xive/p10: Introduce new capability bits
      xive/p10: Configure XIVE for fused cores
      xive/p10: Add automatic Context Save and Restore support
      xive/p10: Introduce a new OPAL_XIVE_IRQ_STORE_EOI2 flag
      xive/p10: Activate split mode for PHB ESBs when PQ_disable is available
      xive/p10: Activate has_array when PQ_disable is available
      xive/p10: Tune max_entries_in_modified when split_mode is on
      xive/p10: Change alignment of the queue overflow pages
      phb5: Activate StoreEOI for LSIs
      xive/p10: Fix xive_special_cache_check when DEBUG=1
      xive/p10: Fix mismatch errors when DEBUG=1
      interrupts: Do not advertise XICS support on P10

Frederic Barrat (9):
      hdata/iohub: Read PCI Gen5 equalization settings for P10
      hw/phb5: Update PHB numbering to allow for virtual PHBs
      phb5: Add register inits specific to Gen5
      phb5: Workaround for PCI bug HW551382
      phb4: Cleanup PEC config discovery in CAPI mode
      phb4/5: Fix PHB link width detection to avoid useless retrainings
      phb5: Fix PHB max link speed definition on P10
      phb4/5: Escalate page-level TCE kills
      npu3: Remove GPU support on Swift

Haren Myneni (5):
      hdat/spira: Define ibm, primary-topology-index property per chip
      hdat/spira: Add ibm, power10-vas-x string to VAS compatible property
      VAS: Define Remote Memory Access paste address on P10
      VAS: Enable VAS on P10
      NX: Set VAS RMA write BAR register on P10

Jordan Niethe (1):
      hw/phb5: Add initial support

Klaus Heinrich Kiwi (1):
      external/gard: Enable Power10

Michael Ellerman (3):
      external/mambo: Print more info when the kernel is too big
      doc: Make it clear all existing platforms use Power9N
      docs: Add Swift, Mowgli & Rainier

Michael Neuling (2):
      p10: Workaround core recovery issue
      phb5: Enable Gen5

Nicholas Piggin (4):
      external/mambo: skiboot.tcl add POWER10 config
      Initial POWER10 enablement
      cpufeatures: Add POWER10 support
      hw/chiptod: Add POWER10 support

Nick Child (1):
      secvar: Free md context on hash error

Oliver O'Halloran (3):
      hw/p8-i2c: Add POWER10 support
      prd: Add base P10 support
      hw/psi-p10: Configure interrupt offset before notify addr

Pratik Rajesh Sampat (1):
      libpore: P10 stop-api support

Reza Arbab (1):
      platforms/astbmc: Add ast2600

Ryan Grimm (2):
      hw/nx: Enable p10 DARN
      hw/chiptod: Retry the sync procedure on failure

Vaidyanathan Srinivasan (3):
      Basic P10 stop state support
      occ: Add POWER10 support
      xive2: Add NCU_SPEC_BAR to stop engine for restore

Vasant Hegde (9):
      external/xscom-utils: Add P10 chip info
      external/opal-prd: Fix occ, homer node label search
      hdata: Add POWER10 support
      hdata/P10: Fix xscom address and ibm, chip-id property
      phys/P10: Use topology index to get phys mapping
      platform: Add Denali platform support
      hw/chiptod: Abort if core frequency is not set
      ci: Bump qemu version
      hello_world: Add p10 mambo tests

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>