Update Op-Build SBE Leves with requisite HB commit
Changes in SBE are forcing the SMF bit to be set for the
XSCOM BAR. This requires a requisite procedure change in
Hostboot for it all to work correctly.
Changes Included for package sbe, branch master-p10:
d9082bf - Srikantha Meesala - 2020-03-04 - Added by default all scoms takes SBE_FIFO FIFO type
236a264 - Sunil Kumar - 2020-03-02 - Enabled the compression/decompression for data section separetely.
93a1dde - Shajith Chandran - 2020-03-02 - Breakup the seeprom image into data and text section
d0084bb - Raja Das - 2020-02-27 - Clear SBE Boot flag in otprom in all reset flow
d0a2d98 - Olsen - 2020-02-27 - Fastarray customization support
329e362 - Ben Gass - 2020-02-27 - Fix overly aggressive name shortening for register constants
024f40e - Greg Still - 2020-02-27 - PM: p10_ipl_customize enablement of HV_INITS dyn init at runtime (deja vu)
b1e6d3f - Prasad Bg Ranganath - 2020-02-26 - Added p10_phb_check_quiesce
5ba7dd3 - Jenny Huynh - 2020-02-26 - Remove nmmu scom initfiles from ppe mirror
diff --git a/openpower/package/hostboot-p10/0001-Always-set-smf-bit-in-xscom-bar.patch b/openpower/package/hostboot-p10/0001-Always-set-smf-bit-in-xscom-bar.patch
new file mode 100644
index 0000000..85883f4
--- /dev/null
+++ b/openpower/package/hostboot-p10/0001-Always-set-smf-bit-in-xscom-bar.patch
@@ -0,0 +1,53 @@
+From fc0ef339de60740ce360f9d4753e3151a62d8abb Mon Sep 17 00:00:00 2001
+From: Jenny Huynh <jhuynh@us.ibm.com>
+Date: Wed, 26 Feb 2020 17:20:44 -0500
+Subject: [PATCH] Always set smf bit in xscom bar
+
+Change-Id: Ib63a60c6790493a73200c42893ae8c591f0b48c7
+---
+ src/import/chips/p10/procedures/hwp/nest/p10_gen_xscom_init.C | 6 +++---
+ .../chips/p10/procedures/xml/attribute_info/p10_sbe_attributes.xml | 4 ----
+ 2 files changed, 3 insertions(+), 7 deletions(-)
+
+diff --git a/src/import/chips/p10/procedures/hwp/nest/p10_gen_xscom_init.C b/src/import/chips/p10/procedures/hwp/nest/p10_gen_xscom_init.C
+index 0bf0266..02fa4d8 100644
+--- a/src/import/chips/p10/procedures/hwp/nest/p10_gen_xscom_init.C
++++ b/src/import/chips/p10/procedures/hwp/nest/p10_gen_xscom_init.C
+@@ -5,7 +5,7 @@
+ /* */
+ /* OpenPOWER HostBoot Project */
+ /* */
+-/* Contributors Listed Below - COPYRIGHT 2019 */
++/* Contributors Listed Below - COPYRIGHT 2019,2020 */
+ /* [+] International Business Machines Corp. */
+ /* */
+ /* */
+@@ -138,8 +138,8 @@ p10_gen_xscom_init(
+ l_xscom_bar_base_addr_offset),
+ "Error from FAPI_ATTR_GET (ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET)");
+
+- l_xscom_addr = l_base_address_mmio +
+- l_xscom_bar_base_addr_offset;
++ l_xscom_addr = l_base_address_mmio + l_xscom_bar_base_addr_offset;
++ l_xscom_addr |= FABRIC_ADDR_SMF_MASK;
+
+ // merge SCOM/PIB address into position for XSCOM address
+ // PIB address 1:31 -> XSCOM address 30:60
+diff --git a/src/import/chips/p10/procedures/xml/attribute_info/p10_sbe_attributes.xml b/src/import/chips/p10/procedures/xml/attribute_info/p10_sbe_attributes.xml
+index fbbaf71..1be95fa 100644
+--- a/src/import/chips/p10/procedures/xml/attribute_info/p10_sbe_attributes.xml
++++ b/src/import/chips/p10/procedures/xml/attribute_info/p10_sbe_attributes.xml
+@@ -469,10 +469,6 @@
+ <value>0x0</value>
+ </entry>
+ <entry>
+- <name>ATTR_SMF_CONFIG</name>
+- <value>0x1</value>
+- </entry>
+- <entry>
+ <name>ATTR_SBE_HBBL_EXCEPTION_INSTRUCT</name>
+ <value>0x48000000</value>
+ </entry>
+--
+1.8.2.2
+
diff --git a/openpower/package/sbe-p10/Config.in b/openpower/package/sbe-p10/Config.in
index 5472036..8ee2b13 100644
--- a/openpower/package/sbe-p10/Config.in
+++ b/openpower/package/sbe-p10/Config.in
@@ -26,7 +26,7 @@
config BR2_SBE_P10_VERSION
string
- default "0d7103b2944b0f4717df084fcdcffafc537322d4" if BR2_SBE_P10_LATEST_VERSION
+ default "d9082bfe6c8b867774d947d1ac992954e8215c7b" if BR2_SBE_P10_LATEST_VERSION
default BR2_SBE_P10_CUSTOM_VERSION_VALUE \
if BR2_SBE_P10_CUSTOM_VERSION